`timescale 1 ps/ 1 ps

module board(
	PIN_HSE,
	PIN_HSI,
	PIN_OSC,
	UART0_UARTRXD,
	UART0_UARTTXD,
	sram_cs_n,
	z80_addr,
	z80_data,
	z80_rd_n,
	z80_wr_n);
input	PIN_HSE;
input	PIN_HSI;
input	PIN_OSC;
input	UART0_UARTRXD;
output	UART0_UARTTXD;
inout	sram_cs_n;
inout	[15:0] z80_addr;
inout	[7:0] z80_data;
inout	z80_rd_n;
inout	z80_wr_n;

//wire	gnd;
//wire	vcc;
//wire	unknown;
wire	AsyncReset_X56_Y1_GND;
wire	AsyncReset_X57_Y1_GND;
wire	AsyncReset_X58_Y2_GND;
wire	AsyncReset_X60_Y1_GND;
wire	AsyncReset_X60_Y4_GND;
wire	AsyncReset_X61_Y2_GND;
wire	\PIN_HSE~input_o ;
wire	\PIN_HSI~input_o ;
wire	\PIN_OSC~input_o ;
wire	\PLL_ENABLE~clkctrl_outclk ;
wire	\PLL_ENABLE~clkctrl_outclk__AsyncReset_X49_Y1_SIG ;
wire	\PLL_ENABLE~combout ;
wire	\PLL_LOCK~combout ;
wire	SyncLoad_X56_Y1_GND;
wire	SyncLoad_X56_Y2_VCC;
wire	SyncLoad_X57_Y1_GND;
wire	SyncLoad_X57_Y2_VCC;
wire	SyncLoad_X57_Y3_VCC;
wire	SyncLoad_X57_Y4_GND;
wire	SyncLoad_X58_Y1_VCC;
wire	SyncLoad_X58_Y2_VCC;
wire	SyncLoad_X58_Y3_VCC;
wire	SyncLoad_X59_Y1_VCC;
wire	SyncLoad_X59_Y2_VCC;
wire	SyncLoad_X60_Y2_VCC;
wire	SyncLoad_X60_Y3_VCC;
wire	SyncLoad_X60_Y4_VCC;
wire	SyncLoad_X61_Y1_VCC;
wire	SyncLoad_X61_Y2_VCC;
wire	SyncLoad_X61_Y3_VCC;
wire	SyncReset_X56_Y2_GND;
wire	SyncReset_X56_Y3_GND;
wire	SyncReset_X57_Y2_GND;
wire	SyncReset_X57_Y3_GND;
wire	SyncReset_X58_Y1_GND;
wire	SyncReset_X58_Y2_GND;
wire	SyncReset_X58_Y3_GND;
wire	SyncReset_X59_Y1_GND;
wire	SyncReset_X59_Y2_GND;
wire	SyncReset_X59_Y3_GND;
wire	SyncReset_X59_Y4_GND;
wire	SyncReset_X60_Y1_GND;
wire	SyncReset_X60_Y2_GND;
wire	SyncReset_X60_Y3_GND;
wire	SyncReset_X60_Y4_GND;
wire	SyncReset_X61_Y1_GND;
wire	SyncReset_X61_Y2_GND;
wire	SyncReset_X61_Y3_GND;
wire	\UART0_UARTRXD~input_o ;
wire	\auto_generated_inst.hbo_13_f13ffbd025d547b8_bp ;
wire	\auto_generated_inst.hbo_13_f13ffbd025d547b8_bp_X49_Y1_SIG_VCC ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y2_SIG_VCC ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X57_Y1_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y1_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y3_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X56_Y2_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X57_Y2_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X58_Y2_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y1_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y3_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X59_Y2_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y1_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y3_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X57_Y3_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X58_Y3_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y1_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y2_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X60_Y3_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X61_Y1_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y2_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X59_Y1_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X61_Y3_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|prdata[0]~1_combout_X60_Y4_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X56_Y1_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y1_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y4_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_cs_n~0_combout_X56_Y1_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_out[0]~0_combout_X57_Y1_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__sys_resetn~clkctrl_outclk_X58_Y2_SIG_INV ;
wire	\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__sys_resetn~clkctrl_outclk_X61_Y2_SIG_INV ;
wire	\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ;
wire	\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y2_SIG_VCC ;
wire	\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X56_Y2_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X58_Y1_SIG_SIG ;
wire	\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y2_SIG_SIG ;
tri1	devclrn;
tri1	devoe;
tri1	devpor;
wire	\gclksw_inst|gclk_switch__alta_gclksw__clkout ;
wire	[7:0] gpio6_io_in;
//wire	gpio6_io_in[0];
//wire	gpio6_io_in[1];
//wire	gpio6_io_in[2];
//wire	gpio6_io_in[3];
//wire	gpio6_io_in[4];
//wire	gpio6_io_in[5];
//wire	gpio6_io_in[6];
//wire	gpio6_io_in[7];
wire	[7:0] gpio7_io_out_data;
//wire	gpio7_io_out_data[0];
//wire	gpio7_io_out_data[1];
//wire	gpio7_io_out_data[2];
//wire	gpio7_io_out_data[3];
//wire	gpio7_io_out_data[4];
//wire	gpio7_io_out_data[5];
//wire	gpio7_io_out_data[6];
//wire	gpio7_io_out_data[7];
wire	[7:0] gpio7_io_out_en;
//wire	gpio7_io_out_en[0];
//wire	gpio7_io_out_en[1];
//wire	gpio7_io_out_en[2];
//wire	gpio7_io_out_en[3];
//wire	gpio7_io_out_en[4];
//wire	gpio7_io_out_en[5];
//wire	gpio7_io_out_en[6];
//wire	gpio7_io_out_en[7];
wire	hbi_272_0_9cb2c0024f9919c5_bp;
wire	hbi_272_1_9cb2c0024f9919c5_bp;
wire	\macro_inst|Equal0~2_combout ;
wire	\macro_inst|Equal0~3_combout ;
wire	\macro_inst|Equal0~4_combout ;
wire	\macro_inst|Equal0~5_combout ;
wire	\macro_inst|Equal0~6_combout ;
wire	\macro_inst|Equal0~7_combout ;
wire	\macro_inst|Equal0~8_combout ;
wire	\macro_inst|Equal0~9_combout ;
wire	\macro_inst|Equal1~0_combout ;
wire	\macro_inst|Equal1~1_combout ;
wire	\macro_inst|Equal2~0_combout ;
wire	\macro_inst|Equal2~1_combout ;
wire	\macro_inst|Equal3~0_combout ;
wire	\macro_inst|Equal4~0_combout ;
wire	\macro_inst|Selector32~0_combout ;
wire	\macro_inst|Selector32~1_combout ;
wire	\macro_inst|Selector32~2_combout ;
wire	\macro_inst|Selector32~3_combout ;
wire	\macro_inst|WideNor0~0_combout ;
wire	\macro_inst|WideNor0~1_combout ;
wire	\macro_inst|ahb2apb_inst|Selector0~0_combout ;
wire	\macro_inst|ahb2apb_inst|Selector2~0_combout ;
wire	\macro_inst|ahb2apb_inst|Selector41~0_combout ;
wire	\macro_inst|ahb2apb_inst|always0~0_combout ;
wire	\macro_inst|ahb2apb_inst|always2~0_combout ;
wire	\macro_inst|ahb2apb_inst|apbState.apbAccess~q ;
wire	\macro_inst|ahb2apb_inst|apbState.apbIdle~q ;
wire	\macro_inst|ahb2apb_inst|apbState.apbSetup~feeder_combout ;
wire	\macro_inst|ahb2apb_inst|apbState.apbSetup~q ;
wire	\macro_inst|ahb2apb_inst|apb_pdone~combout ;
wire	[31:0] \macro_inst|ahb2apb_inst|haddr ;
//wire	\macro_inst|ahb2apb_inst|haddr [0];
//wire	\macro_inst|ahb2apb_inst|haddr [10];
wire	\macro_inst|ahb2apb_inst|haddr[10]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [11];
wire	\macro_inst|ahb2apb_inst|haddr[11]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [12];
wire	\macro_inst|ahb2apb_inst|haddr[12]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [13];
wire	\macro_inst|ahb2apb_inst|haddr[13]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [14];
wire	\macro_inst|ahb2apb_inst|haddr[14]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [15];
//wire	\macro_inst|ahb2apb_inst|haddr [16];
//wire	\macro_inst|ahb2apb_inst|haddr [17];
wire	\macro_inst|ahb2apb_inst|haddr[17]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [18];
wire	\macro_inst|ahb2apb_inst|haddr[18]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [19];
wire	\macro_inst|ahb2apb_inst|haddr[19]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [1];
//wire	\macro_inst|ahb2apb_inst|haddr [20];
//wire	\macro_inst|ahb2apb_inst|haddr [21];
wire	\macro_inst|ahb2apb_inst|haddr[21]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [22];
wire	\macro_inst|ahb2apb_inst|haddr[22]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [23];
//wire	\macro_inst|ahb2apb_inst|haddr [24];
//wire	\macro_inst|ahb2apb_inst|haddr [25];
//wire	\macro_inst|ahb2apb_inst|haddr [26];
//wire	\macro_inst|ahb2apb_inst|haddr [27];
//wire	\macro_inst|ahb2apb_inst|haddr [28];
//wire	\macro_inst|ahb2apb_inst|haddr [29];
//wire	\macro_inst|ahb2apb_inst|haddr [2];
wire	\macro_inst|ahb2apb_inst|haddr[2]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [30];
//wire	\macro_inst|ahb2apb_inst|haddr [31];
//wire	\macro_inst|ahb2apb_inst|haddr [3];
wire	\macro_inst|ahb2apb_inst|haddr[3]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [4];
wire	\macro_inst|ahb2apb_inst|haddr[4]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [5];
wire	\macro_inst|ahb2apb_inst|haddr[5]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [6];
wire	\macro_inst|ahb2apb_inst|haddr[6]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [7];
wire	\macro_inst|ahb2apb_inst|haddr[7]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [8];
wire	\macro_inst|ahb2apb_inst|haddr[8]__feeder__LutOut ;
//wire	\macro_inst|ahb2apb_inst|haddr [9];
wire	\macro_inst|ahb2apb_inst|haddr[9]__feeder__LutOut ;
wire	\macro_inst|ahb2apb_inst|hdone~0_combout ;
wire	\macro_inst|ahb2apb_inst|hdone~q ;
wire	\macro_inst|ahb2apb_inst|hreadyout~0_combout ;
wire	\macro_inst|ahb2apb_inst|hreadyout~1_combout ;
wire	\macro_inst|ahb2apb_inst|hreadyout~q ;
wire	\macro_inst|ahb2apb_inst|hresp~0_combout ;
wire	\macro_inst|ahb2apb_inst|hresp~q ;
wire	\macro_inst|ahb2apb_inst|hwrite__feeder__LutOut ;
wire	\macro_inst|ahb2apb_inst|hwrite~q ;
wire	[31:0] \macro_inst|ahb2apb_inst|paddr ;
//wire	\macro_inst|ahb2apb_inst|paddr [0];
//wire	\macro_inst|ahb2apb_inst|paddr [10];
//wire	\macro_inst|ahb2apb_inst|paddr [11];
wire	\macro_inst|ahb2apb_inst|paddr[11]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|paddr [12];
//wire	\macro_inst|ahb2apb_inst|paddr [13];
wire	\macro_inst|ahb2apb_inst|paddr[13]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|paddr [14];
wire	\macro_inst|ahb2apb_inst|paddr[14]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|paddr [15];
wire	\macro_inst|ahb2apb_inst|paddr[15]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|paddr [16];
//wire	\macro_inst|ahb2apb_inst|paddr [17];
wire	\macro_inst|ahb2apb_inst|paddr[17]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|paddr [18];
wire	\macro_inst|ahb2apb_inst|paddr[18]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|paddr [19];
wire	\macro_inst|ahb2apb_inst|paddr[19]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|paddr [1];
//wire	\macro_inst|ahb2apb_inst|paddr [20];
//wire	\macro_inst|ahb2apb_inst|paddr [21];
wire	\macro_inst|ahb2apb_inst|paddr[21]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|paddr [22];
//wire	\macro_inst|ahb2apb_inst|paddr [23];
wire	\macro_inst|ahb2apb_inst|paddr[23]~0_combout ;
//wire	\macro_inst|ahb2apb_inst|paddr [24];
//wire	\macro_inst|ahb2apb_inst|paddr [25];
//wire	\macro_inst|ahb2apb_inst|paddr [26];
//wire	\macro_inst|ahb2apb_inst|paddr [27];
//wire	\macro_inst|ahb2apb_inst|paddr [28];
//wire	\macro_inst|ahb2apb_inst|paddr [29];
//wire	\macro_inst|ahb2apb_inst|paddr [2];
//wire	\macro_inst|ahb2apb_inst|paddr [30];
//wire	\macro_inst|ahb2apb_inst|paddr [31];
//wire	\macro_inst|ahb2apb_inst|paddr [3];
//wire	\macro_inst|ahb2apb_inst|paddr [4];
//wire	\macro_inst|ahb2apb_inst|paddr [5];
//wire	\macro_inst|ahb2apb_inst|paddr [6];
//wire	\macro_inst|ahb2apb_inst|paddr [7];
//wire	\macro_inst|ahb2apb_inst|paddr [8];
//wire	\macro_inst|ahb2apb_inst|paddr [9];
wire	\macro_inst|ahb2apb_inst|pdone~0_combout ;
wire	\macro_inst|ahb2apb_inst|pdone~1_combout ;
wire	\macro_inst|ahb2apb_inst|pdone~q ;
wire	\macro_inst|ahb2apb_inst|penable~q ;
wire	\macro_inst|ahb2apb_inst|penable~q__SyncReset_X56_Y1_SIG ;
wire	[31:0] \macro_inst|ahb2apb_inst|prdata ;
//wire	\macro_inst|ahb2apb_inst|prdata [0];
wire	\macro_inst|ahb2apb_inst|prdata[0]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|prdata [10];
//wire	\macro_inst|ahb2apb_inst|prdata [11];
//wire	\macro_inst|ahb2apb_inst|prdata [12];
//wire	\macro_inst|ahb2apb_inst|prdata [13];
//wire	\macro_inst|ahb2apb_inst|prdata [14];
//wire	\macro_inst|ahb2apb_inst|prdata [15];
//wire	\macro_inst|ahb2apb_inst|prdata [16];
//wire	\macro_inst|ahb2apb_inst|prdata [17];
//wire	\macro_inst|ahb2apb_inst|prdata [18];
//wire	\macro_inst|ahb2apb_inst|prdata [19];
wire	\macro_inst|ahb2apb_inst|prdata[19]~0_combout ;
//wire	\macro_inst|ahb2apb_inst|prdata [1];
wire	\macro_inst|ahb2apb_inst|prdata[1]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|prdata [20];
//wire	\macro_inst|ahb2apb_inst|prdata [21];
//wire	\macro_inst|ahb2apb_inst|prdata [22];
//wire	\macro_inst|ahb2apb_inst|prdata [23];
//wire	\macro_inst|ahb2apb_inst|prdata [24];
//wire	\macro_inst|ahb2apb_inst|prdata [25];
//wire	\macro_inst|ahb2apb_inst|prdata [26];
//wire	\macro_inst|ahb2apb_inst|prdata [27];
//wire	\macro_inst|ahb2apb_inst|prdata [28];
//wire	\macro_inst|ahb2apb_inst|prdata [29];
//wire	\macro_inst|ahb2apb_inst|prdata [2];
wire	\macro_inst|ahb2apb_inst|prdata[2]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|prdata [30];
//wire	\macro_inst|ahb2apb_inst|prdata [31];
//wire	\macro_inst|ahb2apb_inst|prdata [3];
wire	\macro_inst|ahb2apb_inst|prdata[3]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|prdata [4];
//wire	\macro_inst|ahb2apb_inst|prdata [5];
wire	\macro_inst|ahb2apb_inst|prdata[5]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|prdata [6];
wire	\macro_inst|ahb2apb_inst|prdata[6]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|prdata [7];
wire	\macro_inst|ahb2apb_inst|prdata[7]~feeder_combout ;
//wire	\macro_inst|ahb2apb_inst|prdata [8];
//wire	\macro_inst|ahb2apb_inst|prdata [9];
wire	\macro_inst|ahb2apb_inst|psel~0_combout ;
wire	\macro_inst|ahb2apb_inst|psel~1_combout ;
wire	\macro_inst|ahb2apb_inst|psel~q ;
wire	\macro_inst|ahb2apb_inst|psel~q__SyncLoad_X56_Y3_INV ;
wire	\macro_inst|ahb2apb_inst|psel~q__SyncLoad_X60_Y1_INV ;
wire	\macro_inst|ahb2apb_inst|psel~q__SyncReset_X57_Y1_INV ;
wire	\macro_inst|ahb2apb_inst|pvalid~q ;
wire	\macro_inst|ahb2apb_inst|pwrite~q ;
wire	\macro_inst|apb_prdata[0]~34_combout ;
wire	\macro_inst|apb_prdata[0]~35_combout ;
wire	\macro_inst|apb_prdata[0]~36_combout ;
wire	\macro_inst|apb_prdata[10]~114_combout ;
wire	\macro_inst|apb_prdata[10]~63_combout ;
wire	\macro_inst|apb_prdata[10]~64_combout ;
wire	\macro_inst|apb_prdata[11]~115_combout ;
wire	\macro_inst|apb_prdata[11]~65_combout ;
wire	\macro_inst|apb_prdata[11]~66_combout ;
wire	\macro_inst|apb_prdata[12]~116_combout ;
wire	\macro_inst|apb_prdata[12]~67_combout ;
wire	\macro_inst|apb_prdata[12]~68_combout ;
wire	\macro_inst|apb_prdata[13]~117_combout ;
wire	\macro_inst|apb_prdata[13]~69_combout ;
wire	\macro_inst|apb_prdata[13]~70_combout ;
wire	\macro_inst|apb_prdata[14]~71_combout ;
wire	\macro_inst|apb_prdata[14]~72_combout ;
wire	\macro_inst|apb_prdata[14]~73_combout ;
wire	\macro_inst|apb_prdata[15]~118_combout ;
wire	\macro_inst|apb_prdata[15]~74_combout ;
wire	\macro_inst|apb_prdata[15]~75_combout ;
wire	\macro_inst|apb_prdata[16]~119_combout ;
wire	\macro_inst|apb_prdata[16]~76_combout ;
wire	\macro_inst|apb_prdata[16]~77_combout ;
wire	\macro_inst|apb_prdata[17]~78_combout ;
wire	\macro_inst|apb_prdata[17]~79_combout ;
wire	\macro_inst|apb_prdata[17]~80_combout ;
wire	\macro_inst|apb_prdata[18]~120_combout ;
wire	\macro_inst|apb_prdata[18]~81_combout ;
wire	\macro_inst|apb_prdata[18]~82_combout ;
wire	\macro_inst|apb_prdata[19]~121_combout ;
wire	\macro_inst|apb_prdata[19]~83_combout ;
wire	\macro_inst|apb_prdata[19]~84_combout ;
wire	\macro_inst|apb_prdata[1]~37_combout ;
wire	\macro_inst|apb_prdata[1]~38_combout ;
wire	\macro_inst|apb_prdata[1]~39_combout ;
wire	\macro_inst|apb_prdata[20]~85_combout ;
wire	\macro_inst|apb_prdata[20]~86_combout ;
wire	\macro_inst|apb_prdata[20]~87_combout ;
wire	\macro_inst|apb_prdata[21]~122_combout ;
wire	\macro_inst|apb_prdata[21]~88_combout ;
wire	\macro_inst|apb_prdata[21]~89_combout ;
wire	\macro_inst|apb_prdata[22]~90_combout ;
wire	\macro_inst|apb_prdata[22]~91_combout ;
wire	\macro_inst|apb_prdata[22]~92_combout ;
wire	\macro_inst|apb_prdata[23]~123_combout ;
wire	\macro_inst|apb_prdata[23]~93_combout ;
wire	\macro_inst|apb_prdata[23]~94_combout ;
wire	\macro_inst|apb_prdata[24]~95_combout ;
wire	\macro_inst|apb_prdata[24]~96_combout ;
wire	\macro_inst|apb_prdata[24]~97_combout ;
wire	\macro_inst|apb_prdata[25]~124_combout ;
wire	\macro_inst|apb_prdata[25]~98_combout ;
wire	\macro_inst|apb_prdata[25]~99_combout ;
wire	\macro_inst|apb_prdata[26]~100_combout ;
wire	\macro_inst|apb_prdata[26]~101_combout ;
wire	\macro_inst|apb_prdata[26]~125_combout ;
wire	\macro_inst|apb_prdata[27]~102_combout ;
wire	\macro_inst|apb_prdata[27]~103_combout ;
wire	\macro_inst|apb_prdata[27]~126_combout ;
wire	\macro_inst|apb_prdata[28]~104_combout ;
wire	\macro_inst|apb_prdata[28]~105_combout ;
wire	\macro_inst|apb_prdata[28]~127_combout ;
wire	\macro_inst|apb_prdata[29]~106_combout ;
wire	\macro_inst|apb_prdata[29]~107_combout ;
wire	\macro_inst|apb_prdata[29]~108_combout ;
wire	\macro_inst|apb_prdata[2]~40_combout ;
wire	\macro_inst|apb_prdata[2]~41_combout ;
wire	\macro_inst|apb_prdata[2]~42_combout ;
wire	\macro_inst|apb_prdata[30]~109_combout ;
wire	\macro_inst|apb_prdata[30]~110_combout ;
wire	\macro_inst|apb_prdata[30]~128_combout ;
wire	\macro_inst|apb_prdata[31]~111_combout ;
wire	\macro_inst|apb_prdata[31]~112_combout ;
wire	\macro_inst|apb_prdata[31]~129_combout ;
wire	\macro_inst|apb_prdata[3]~43_combout ;
wire	\macro_inst|apb_prdata[3]~44_combout ;
wire	\macro_inst|apb_prdata[3]~45_combout ;
wire	\macro_inst|apb_prdata[4]~46_combout ;
wire	\macro_inst|apb_prdata[4]~47_combout ;
wire	\macro_inst|apb_prdata[4]~48_combout ;
wire	\macro_inst|apb_prdata[5]~49_combout ;
wire	\macro_inst|apb_prdata[5]~50_combout ;
wire	\macro_inst|apb_prdata[5]~51_combout ;
wire	\macro_inst|apb_prdata[6]~52_combout ;
wire	\macro_inst|apb_prdata[6]~53_combout ;
wire	\macro_inst|apb_prdata[6]~54_combout ;
wire	\macro_inst|apb_prdata[7]~55_combout ;
wire	\macro_inst|apb_prdata[7]~56_combout ;
wire	\macro_inst|apb_prdata[7]~57_combout ;
wire	\macro_inst|apb_prdata[8]~58_combout ;
wire	\macro_inst|apb_prdata[8]~59_combout ;
wire	\macro_inst|apb_prdata[8]~60_combout ;
wire	\macro_inst|apb_prdata[9]~113_combout ;
wire	\macro_inst|apb_prdata[9]~61_combout ;
wire	\macro_inst|apb_prdata[9]~62_combout ;
wire	\macro_inst|apb_pready~0_combout ;
wire	\macro_inst|u_reg0|pready~0_combout ;
wire	\macro_inst|u_reg0|pready~q ;
wire	[31:0] \macro_inst|u_reg0|reg_out ;
//wire	\macro_inst|u_reg0|reg_out [0];
wire	\macro_inst|u_reg0|reg_out[0]~0_combout ;
//wire	\macro_inst|u_reg0|reg_out [10];
//wire	\macro_inst|u_reg0|reg_out [11];
//wire	\macro_inst|u_reg0|reg_out [12];
//wire	\macro_inst|u_reg0|reg_out [13];
//wire	\macro_inst|u_reg0|reg_out [14];
//wire	\macro_inst|u_reg0|reg_out [15];
//wire	\macro_inst|u_reg0|reg_out [16];
//wire	\macro_inst|u_reg0|reg_out [17];
//wire	\macro_inst|u_reg0|reg_out [18];
//wire	\macro_inst|u_reg0|reg_out [19];
//wire	\macro_inst|u_reg0|reg_out [1];
wire	\macro_inst|u_reg0|reg_out[1]__feeder__LutOut ;
//wire	\macro_inst|u_reg0|reg_out [20];
//wire	\macro_inst|u_reg0|reg_out [21];
//wire	\macro_inst|u_reg0|reg_out [22];
//wire	\macro_inst|u_reg0|reg_out [23];
//wire	\macro_inst|u_reg0|reg_out [24];
//wire	\macro_inst|u_reg0|reg_out [25];
//wire	\macro_inst|u_reg0|reg_out [26];
//wire	\macro_inst|u_reg0|reg_out [27];
//wire	\macro_inst|u_reg0|reg_out [28];
//wire	\macro_inst|u_reg0|reg_out [29];
//wire	\macro_inst|u_reg0|reg_out [2];
wire	\macro_inst|u_reg0|reg_out[2]__feeder__LutOut ;
//wire	\macro_inst|u_reg0|reg_out [30];
//wire	\macro_inst|u_reg0|reg_out [31];
//wire	\macro_inst|u_reg0|reg_out [3];
wire	\macro_inst|u_reg0|reg_out[3]__feeder__LutOut ;
//wire	\macro_inst|u_reg0|reg_out [4];
wire	\macro_inst|u_reg0|reg_out[4]__feeder__LutOut ;
//wire	\macro_inst|u_reg0|reg_out [5];
wire	\macro_inst|u_reg0|reg_out[5]__feeder__LutOut ;
//wire	\macro_inst|u_reg0|reg_out [6];
wire	\macro_inst|u_reg0|reg_out[6]__feeder__LutOut ;
//wire	\macro_inst|u_reg0|reg_out [7];
wire	\macro_inst|u_reg0|reg_out[7]__feeder__LutOut ;
//wire	\macro_inst|u_reg0|reg_out [8];
//wire	\macro_inst|u_reg0|reg_out [9];
wire	\macro_inst|u_reg1|pready~0_combout ;
wire	\macro_inst|u_reg1|pready~q ;
wire	[31:0] \macro_inst|u_reg1|reg_out ;
//wire	\macro_inst|u_reg1|reg_out [0];
wire	\macro_inst|u_reg1|reg_out[0]__feeder__LutOut ;
wire	\macro_inst|u_reg1|reg_out[0]~0_combout ;
//wire	\macro_inst|u_reg1|reg_out [10];
//wire	\macro_inst|u_reg1|reg_out [11];
//wire	\macro_inst|u_reg1|reg_out [12];
//wire	\macro_inst|u_reg1|reg_out [13];
//wire	\macro_inst|u_reg1|reg_out [14];
wire	\macro_inst|u_reg1|reg_out[14]__feeder__LutOut ;
//wire	\macro_inst|u_reg1|reg_out [15];
//wire	\macro_inst|u_reg1|reg_out [16];
//wire	\macro_inst|u_reg1|reg_out [17];
//wire	\macro_inst|u_reg1|reg_out [18];
wire	\macro_inst|u_reg1|reg_out[18]__feeder__LutOut ;
//wire	\macro_inst|u_reg1|reg_out [19];
//wire	\macro_inst|u_reg1|reg_out [1];
//wire	\macro_inst|u_reg1|reg_out [20];
//wire	\macro_inst|u_reg1|reg_out [21];
//wire	\macro_inst|u_reg1|reg_out [22];
//wire	\macro_inst|u_reg1|reg_out [23];
//wire	\macro_inst|u_reg1|reg_out [24];
wire	\macro_inst|u_reg1|reg_out[24]__feeder__LutOut ;
//wire	\macro_inst|u_reg1|reg_out [25];
//wire	\macro_inst|u_reg1|reg_out [26];
wire	\macro_inst|u_reg1|reg_out[26]__feeder__LutOut ;
//wire	\macro_inst|u_reg1|reg_out [27];
//wire	\macro_inst|u_reg1|reg_out [28];
//wire	\macro_inst|u_reg1|reg_out [29];
//wire	\macro_inst|u_reg1|reg_out [2];
//wire	\macro_inst|u_reg1|reg_out [30];
wire	\macro_inst|u_reg1|reg_out[30]__feeder__LutOut ;
//wire	\macro_inst|u_reg1|reg_out [31];
//wire	\macro_inst|u_reg1|reg_out [3];
//wire	\macro_inst|u_reg1|reg_out [4];
//wire	\macro_inst|u_reg1|reg_out [5];
//wire	\macro_inst|u_reg1|reg_out [6];
//wire	\macro_inst|u_reg1|reg_out [7];
//wire	\macro_inst|u_reg1|reg_out [8];
//wire	\macro_inst|u_reg1|reg_out [9];
wire	\macro_inst|u_reg2|pready~0_combout ;
wire	\macro_inst|u_reg2|pready~feeder_combout ;
wire	\macro_inst|u_reg2|pready~q ;
wire	[31:0] \macro_inst|u_reg2|reg_out ;
//wire	\macro_inst|u_reg2|reg_out [0];
wire	\macro_inst|u_reg2|reg_out[0]~0_combout ;
//wire	\macro_inst|u_reg2|reg_out [10];
//wire	\macro_inst|u_reg2|reg_out [11];
//wire	\macro_inst|u_reg2|reg_out [12];
//wire	\macro_inst|u_reg2|reg_out [13];
//wire	\macro_inst|u_reg2|reg_out [14];
//wire	\macro_inst|u_reg2|reg_out [15];
//wire	\macro_inst|u_reg2|reg_out [16];
//wire	\macro_inst|u_reg2|reg_out [17];
//wire	\macro_inst|u_reg2|reg_out [18];
//wire	\macro_inst|u_reg2|reg_out [19];
//wire	\macro_inst|u_reg2|reg_out [1];
//wire	\macro_inst|u_reg2|reg_out [20];
//wire	\macro_inst|u_reg2|reg_out [21];
//wire	\macro_inst|u_reg2|reg_out [22];
//wire	\macro_inst|u_reg2|reg_out [23];
//wire	\macro_inst|u_reg2|reg_out [24];
//wire	\macro_inst|u_reg2|reg_out [25];
wire	\macro_inst|u_reg2|reg_out[25]__feeder__LutOut ;
//wire	\macro_inst|u_reg2|reg_out [26];
//wire	\macro_inst|u_reg2|reg_out [27];
//wire	\macro_inst|u_reg2|reg_out [28];
//wire	\macro_inst|u_reg2|reg_out [29];
wire	\macro_inst|u_reg2|reg_out[29]__feeder__LutOut ;
//wire	\macro_inst|u_reg2|reg_out [2];
//wire	\macro_inst|u_reg2|reg_out [30];
//wire	\macro_inst|u_reg2|reg_out [31];
wire	\macro_inst|u_reg2|reg_out[31]__feeder__LutOut ;
//wire	\macro_inst|u_reg2|reg_out [3];
//wire	\macro_inst|u_reg2|reg_out [4];
wire	\macro_inst|u_reg2|reg_out[4]__feeder__LutOut ;
//wire	\macro_inst|u_reg2|reg_out [5];
//wire	\macro_inst|u_reg2|reg_out [6];
//wire	\macro_inst|u_reg2|reg_out [7];
//wire	\macro_inst|u_reg2|reg_out [8];
//wire	\macro_inst|u_reg2|reg_out [9];
wire	\macro_inst|u_reg_sram_addr|always0~0_combout ;
wire	\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ;
wire	\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ;
wire	\macro_inst|u_reg_sram_addr|pready~0_combout ;
wire	\macro_inst|u_reg_sram_addr|pready~q ;
wire	[31:0] \macro_inst|u_reg_sram_addr|reg_out ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [0];
wire	\macro_inst|u_reg_sram_addr|reg_out[0]~32_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[0]~33 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [10];
wire	\macro_inst|u_reg_sram_addr|reg_out[10]~54_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[10]~55 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [11];
wire	\macro_inst|u_reg_sram_addr|reg_out[11]~56_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[11]~57 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [12];
wire	\macro_inst|u_reg_sram_addr|reg_out[12]~58_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[12]~59 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [13];
wire	\macro_inst|u_reg_sram_addr|reg_out[13]~60_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[13]~61 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [14];
wire	\macro_inst|u_reg_sram_addr|reg_out[14]~62_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[14]~63 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [15];
wire	\macro_inst|u_reg_sram_addr|reg_out[15]~64_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[15]~65 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [16];
wire	\macro_inst|u_reg_sram_addr|reg_out[16]~66_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[16]~67 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [17];
wire	\macro_inst|u_reg_sram_addr|reg_out[17]~68_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[17]~69 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [18];
wire	\macro_inst|u_reg_sram_addr|reg_out[18]~70_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[18]~71 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [19];
wire	\macro_inst|u_reg_sram_addr|reg_out[19]~72_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[19]~73 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [1];
wire	\macro_inst|u_reg_sram_addr|reg_out[1]~36_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[1]~37 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [20];
wire	\macro_inst|u_reg_sram_addr|reg_out[20]~74_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[20]~75 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [21];
wire	\macro_inst|u_reg_sram_addr|reg_out[21]~76_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[21]~77 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [22];
wire	\macro_inst|u_reg_sram_addr|reg_out[22]~78_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[22]~79 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [23];
wire	\macro_inst|u_reg_sram_addr|reg_out[23]~34_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[23]~35_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[23]~80_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[23]~81 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [24];
wire	\macro_inst|u_reg_sram_addr|reg_out[24]~82_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[24]~83 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [25];
wire	\macro_inst|u_reg_sram_addr|reg_out[25]~84_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[25]~85 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [26];
wire	\macro_inst|u_reg_sram_addr|reg_out[26]~86_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[26]~87 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [27];
wire	\macro_inst|u_reg_sram_addr|reg_out[27]~88_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[27]~89 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [28];
wire	\macro_inst|u_reg_sram_addr|reg_out[28]~90_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[28]~91 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [29];
wire	\macro_inst|u_reg_sram_addr|reg_out[29]~92_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[29]~93 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [2];
wire	\macro_inst|u_reg_sram_addr|reg_out[2]~38_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[2]~39 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [30];
wire	\macro_inst|u_reg_sram_addr|reg_out[30]~94_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[30]~95 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [31];
wire	\macro_inst|u_reg_sram_addr|reg_out[31]~96_combout ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [3];
wire	\macro_inst|u_reg_sram_addr|reg_out[3]~40_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[3]~41 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [4];
wire	\macro_inst|u_reg_sram_addr|reg_out[4]~42_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[4]~43 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [5];
wire	\macro_inst|u_reg_sram_addr|reg_out[5]~44_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[5]~45 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [6];
wire	\macro_inst|u_reg_sram_addr|reg_out[6]~46_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[6]~47 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [7];
wire	\macro_inst|u_reg_sram_addr|reg_out[7]~48_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[7]~49 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [8];
wire	\macro_inst|u_reg_sram_addr|reg_out[8]~50_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[8]~51 ;
//wire	\macro_inst|u_reg_sram_addr|reg_out [9];
wire	\macro_inst|u_reg_sram_addr|reg_out[9]~52_combout ;
wire	\macro_inst|u_reg_sram_addr|reg_out[9]~53 ;
wire	\macro_inst|u_sram|LessThan0~0_combout ;
wire	\macro_inst|u_sram|LessThan0~1_combout ;
wire	\macro_inst|u_sram|LessThan0~2_combout ;
wire	\macro_inst|u_sram|LessThan0~3_combout ;
wire	\macro_inst|u_sram|LessThan0~4_combout ;
wire	[31:0] \macro_inst|u_sram|prdata ;
//wire	\macro_inst|u_sram|prdata [0];
wire	\macro_inst|u_sram|prdata[0]~0_combout ;
wire	\macro_inst|u_sram|prdata[0]~1_combout ;
//wire	\macro_inst|u_sram|prdata [10];
//wire	\macro_inst|u_sram|prdata [11];
//wire	\macro_inst|u_sram|prdata [12];
//wire	\macro_inst|u_sram|prdata [13];
//wire	\macro_inst|u_sram|prdata [14];
//wire	\macro_inst|u_sram|prdata [15];
//wire	\macro_inst|u_sram|prdata [16];
//wire	\macro_inst|u_sram|prdata [17];
//wire	\macro_inst|u_sram|prdata [18];
//wire	\macro_inst|u_sram|prdata [19];
//wire	\macro_inst|u_sram|prdata [1];
//wire	\macro_inst|u_sram|prdata [20];
//wire	\macro_inst|u_sram|prdata [21];
//wire	\macro_inst|u_sram|prdata [22];
//wire	\macro_inst|u_sram|prdata [23];
//wire	\macro_inst|u_sram|prdata [24];
//wire	\macro_inst|u_sram|prdata [25];
//wire	\macro_inst|u_sram|prdata [26];
//wire	\macro_inst|u_sram|prdata [27];
//wire	\macro_inst|u_sram|prdata [28];
//wire	\macro_inst|u_sram|prdata [29];
//wire	\macro_inst|u_sram|prdata [2];
//wire	\macro_inst|u_sram|prdata [30];
//wire	\macro_inst|u_sram|prdata [31];
//wire	\macro_inst|u_sram|prdata [3];
//wire	\macro_inst|u_sram|prdata [4];
//wire	\macro_inst|u_sram|prdata [5];
//wire	\macro_inst|u_sram|prdata [6];
//wire	\macro_inst|u_sram|prdata [7];
//wire	\macro_inst|u_sram|prdata [8];
//wire	\macro_inst|u_sram|prdata [9];
wire	[1:0] \macro_inst|u_sram|pready_shift ;
//wire	\macro_inst|u_sram|pready_shift [0];
wire	\macro_inst|u_sram|pready_shift[0]~feeder_combout ;
//wire	\macro_inst|u_sram|pready_shift [1];
wire	\macro_inst|u_sram|pready~0_combout ;
wire	\macro_inst|u_sram|pready~q ;
wire	[15:0] \macro_inst|u_sram|sram_addr ;
//wire	\macro_inst|u_sram|sram_addr [0];
wire	\macro_inst|u_sram|sram_addr[0]~0_combout ;
wire	\macro_inst|u_sram|sram_addr[0]~1_combout ;
//wire	\macro_inst|u_sram|sram_addr [10];
wire	\macro_inst|u_sram|sram_addr[10]~feeder_combout ;
//wire	\macro_inst|u_sram|sram_addr [11];
wire	\macro_inst|u_sram|sram_addr[11]~feeder_combout ;
//wire	\macro_inst|u_sram|sram_addr [12];
wire	\macro_inst|u_sram|sram_addr[12]~feeder_combout ;
//wire	\macro_inst|u_sram|sram_addr [13];
wire	\macro_inst|u_sram|sram_addr[13]~feeder_combout ;
//wire	\macro_inst|u_sram|sram_addr [14];
wire	\macro_inst|u_sram|sram_addr[14]~feeder_combout ;
//wire	\macro_inst|u_sram|sram_addr [15];
wire	\macro_inst|u_sram|sram_addr[15]~feeder_combout ;
//wire	\macro_inst|u_sram|sram_addr [1];
wire	\macro_inst|u_sram|sram_addr[1]~feeder_combout ;
//wire	\macro_inst|u_sram|sram_addr [2];
//wire	\macro_inst|u_sram|sram_addr [3];
//wire	\macro_inst|u_sram|sram_addr [4];
wire	\macro_inst|u_sram|sram_addr[4]~feeder_combout ;
//wire	\macro_inst|u_sram|sram_addr [5];
wire	\macro_inst|u_sram|sram_addr[5]~feeder_combout ;
//wire	\macro_inst|u_sram|sram_addr [6];
wire	\macro_inst|u_sram|sram_addr[6]~feeder_combout ;
//wire	\macro_inst|u_sram|sram_addr [7];
wire	\macro_inst|u_sram|sram_addr[7]~feeder_combout ;
//wire	\macro_inst|u_sram|sram_addr [8];
wire	\macro_inst|u_sram|sram_addr[8]~feeder_combout ;
//wire	\macro_inst|u_sram|sram_addr [9];
wire	\macro_inst|u_sram|sram_addr[9]~feeder_combout ;
wire	\macro_inst|u_sram|sram_cs_n~0_combout ;
wire	\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ;
wire	\macro_inst|u_sram|sram_cs_n~feeder_combout ;
wire	\macro_inst|u_sram|sram_cs_n~q ;
wire	\macro_inst|u_sram|sram_oe_n~0_combout ;
wire	\macro_inst|u_sram|sram_oe_n~q ;
wire	[7:0] \macro_inst|u_sram|sram_out ;
//wire	\macro_inst|u_sram|sram_out [0];
wire	\macro_inst|u_sram|sram_out[0]__feeder__LutOut ;
wire	\macro_inst|u_sram|sram_out[0]~0_combout ;
wire	\macro_inst|u_sram|sram_out[0]~1_combout ;
//wire	\macro_inst|u_sram|sram_out [1];
wire	\macro_inst|u_sram|sram_out[1]__feeder__LutOut ;
//wire	\macro_inst|u_sram|sram_out [2];
wire	\macro_inst|u_sram|sram_out[2]__feeder__LutOut ;
//wire	\macro_inst|u_sram|sram_out [3];
wire	\macro_inst|u_sram|sram_out[3]__feeder__LutOut ;
//wire	\macro_inst|u_sram|sram_out [4];
wire	\macro_inst|u_sram|sram_out[4]__feeder__LutOut ;
//wire	\macro_inst|u_sram|sram_out [5];
wire	\macro_inst|u_sram|sram_out[5]__feeder__LutOut ;
//wire	\macro_inst|u_sram|sram_out [6];
wire	\macro_inst|u_sram|sram_out[6]__feeder__LutOut ;
//wire	\macro_inst|u_sram|sram_out [7];
wire	\macro_inst|u_sram|sram_out[7]__feeder__LutOut ;
wire	\macro_inst|u_sram|sram_out_oe~0_combout ;
wire	\macro_inst|u_sram|sram_out_oe~q ;
wire	\macro_inst|u_sram|sram_we_n~q ;
wire	[15:0] \macro_inst|u_sram|wait_cnt ;
//wire	\macro_inst|u_sram|wait_cnt [0];
wire	\macro_inst|u_sram|wait_cnt[0]~16_combout ;
wire	\macro_inst|u_sram|wait_cnt[0]~17 ;
//wire	\macro_inst|u_sram|wait_cnt [10];
wire	\macro_inst|u_sram|wait_cnt[10]~36_combout ;
wire	\macro_inst|u_sram|wait_cnt[10]~37 ;
//wire	\macro_inst|u_sram|wait_cnt [11];
wire	\macro_inst|u_sram|wait_cnt[11]~38_combout ;
wire	\macro_inst|u_sram|wait_cnt[11]~39 ;
//wire	\macro_inst|u_sram|wait_cnt [12];
wire	\macro_inst|u_sram|wait_cnt[12]~40_combout ;
wire	\macro_inst|u_sram|wait_cnt[12]~41 ;
//wire	\macro_inst|u_sram|wait_cnt [13];
wire	\macro_inst|u_sram|wait_cnt[13]~42_combout ;
wire	\macro_inst|u_sram|wait_cnt[13]~43 ;
//wire	\macro_inst|u_sram|wait_cnt [14];
wire	\macro_inst|u_sram|wait_cnt[14]~44_combout ;
wire	\macro_inst|u_sram|wait_cnt[14]~45 ;
//wire	\macro_inst|u_sram|wait_cnt [15];
wire	\macro_inst|u_sram|wait_cnt[15]~46_combout ;
//wire	\macro_inst|u_sram|wait_cnt [1];
wire	\macro_inst|u_sram|wait_cnt[1]~18_combout ;
wire	\macro_inst|u_sram|wait_cnt[1]~19 ;
//wire	\macro_inst|u_sram|wait_cnt [2];
wire	\macro_inst|u_sram|wait_cnt[2]~20_combout ;
wire	\macro_inst|u_sram|wait_cnt[2]~21 ;
//wire	\macro_inst|u_sram|wait_cnt [3];
wire	\macro_inst|u_sram|wait_cnt[3]~22_combout ;
wire	\macro_inst|u_sram|wait_cnt[3]~23 ;
//wire	\macro_inst|u_sram|wait_cnt [4];
wire	\macro_inst|u_sram|wait_cnt[4]~24_combout ;
wire	\macro_inst|u_sram|wait_cnt[4]~25 ;
//wire	\macro_inst|u_sram|wait_cnt [5];
wire	\macro_inst|u_sram|wait_cnt[5]~26_combout ;
wire	\macro_inst|u_sram|wait_cnt[5]~27 ;
//wire	\macro_inst|u_sram|wait_cnt [6];
wire	\macro_inst|u_sram|wait_cnt[6]~28_combout ;
wire	\macro_inst|u_sram|wait_cnt[6]~29 ;
//wire	\macro_inst|u_sram|wait_cnt [7];
wire	\macro_inst|u_sram|wait_cnt[7]~30_combout ;
wire	\macro_inst|u_sram|wait_cnt[7]~31 ;
//wire	\macro_inst|u_sram|wait_cnt [8];
wire	\macro_inst|u_sram|wait_cnt[8]~32_combout ;
wire	\macro_inst|u_sram|wait_cnt[8]~33 ;
//wire	\macro_inst|u_sram|wait_cnt [9];
wire	\macro_inst|u_sram|wait_cnt[9]~34_combout ;
wire	\macro_inst|u_sram|wait_cnt[9]~35 ;
wire	[4:0] \pll_inst|auto_generated|clk ;
//wire	\pll_inst|auto_generated|clk [0];
//wire	\pll_inst|auto_generated|clk [1];
//wire	\pll_inst|auto_generated|clk [2];
//wire	\pll_inst|auto_generated|clk [3];
//wire	\pll_inst|auto_generated|clk [4];
wire	[4:0] \pll_inst|auto_generated|pll1_CLK_bus ;
//wire	\pll_inst|auto_generated|pll1_CLK_bus [0];
//wire	\pll_inst|auto_generated|pll1_CLK_bus [1];
//wire	\pll_inst|auto_generated|pll1_CLK_bus [2];
//wire	\pll_inst|auto_generated|pll1_CLK_bus [3];
//wire	\pll_inst|auto_generated|pll1_CLK_bus [4];
wire	\pll_inst|auto_generated|pll1~FBOUT ;
wire	\pll_inst|auto_generated|pll_lock_sync~feeder_combout ;
wire	\pll_inst|auto_generated|pll_lock_sync~q ;
wire	\rv32.dmactive ;
wire	\rv32.ext_dma_DMACCLR[0] ;
wire	\rv32.ext_dma_DMACCLR[1] ;
wire	\rv32.ext_dma_DMACCLR[2] ;
wire	\rv32.ext_dma_DMACCLR[3] ;
wire	\rv32.ext_dma_DMACTC[0] ;
wire	\rv32.ext_dma_DMACTC[1] ;
wire	\rv32.ext_dma_DMACTC[2] ;
wire	\rv32.ext_dma_DMACTC[3] ;
wire	\rv32.gpio0_io_out_data[0] ;
wire	\rv32.gpio0_io_out_data[1] ;
wire	\rv32.gpio0_io_out_data[2] ;
wire	\rv32.gpio0_io_out_data[3] ;
wire	\rv32.gpio0_io_out_data[4] ;
wire	\rv32.gpio0_io_out_data[5] ;
wire	\rv32.gpio0_io_out_data[6] ;
wire	\rv32.gpio0_io_out_data[7] ;
wire	\rv32.gpio0_io_out_en[0] ;
wire	\rv32.gpio0_io_out_en[1] ;
wire	\rv32.gpio0_io_out_en[2] ;
wire	\rv32.gpio0_io_out_en[3] ;
wire	\rv32.gpio0_io_out_en[4] ;
wire	\rv32.gpio0_io_out_en[5] ;
wire	\rv32.gpio0_io_out_en[6] ;
wire	\rv32.gpio0_io_out_en[7] ;
wire	\rv32.gpio1_io_out_data[0] ;
wire	\rv32.gpio1_io_out_data[1] ;
wire	\rv32.gpio1_io_out_data[2] ;
wire	\rv32.gpio1_io_out_data[3] ;
wire	\rv32.gpio1_io_out_data[4] ;
wire	\rv32.gpio1_io_out_data[5] ;
wire	\rv32.gpio1_io_out_data[6] ;
wire	\rv32.gpio1_io_out_data[7] ;
wire	\rv32.gpio1_io_out_en[0] ;
wire	\rv32.gpio1_io_out_en[1] ;
wire	\rv32.gpio1_io_out_en[2] ;
wire	\rv32.gpio1_io_out_en[3] ;
wire	\rv32.gpio1_io_out_en[4] ;
wire	\rv32.gpio1_io_out_en[5] ;
wire	\rv32.gpio1_io_out_en[6] ;
wire	\rv32.gpio1_io_out_en[7] ;
wire	\rv32.gpio2_io_out_data[0] ;
wire	\rv32.gpio2_io_out_data[1] ;
wire	\rv32.gpio2_io_out_data[2] ;
wire	\rv32.gpio2_io_out_data[3] ;
wire	\rv32.gpio2_io_out_data[4] ;
wire	\rv32.gpio2_io_out_data[5] ;
wire	\rv32.gpio2_io_out_data[6] ;
wire	\rv32.gpio2_io_out_data[7] ;
wire	\rv32.gpio2_io_out_en[0] ;
wire	\rv32.gpio2_io_out_en[1] ;
wire	\rv32.gpio2_io_out_en[2] ;
wire	\rv32.gpio2_io_out_en[3] ;
wire	\rv32.gpio2_io_out_en[4] ;
wire	\rv32.gpio2_io_out_en[5] ;
wire	\rv32.gpio2_io_out_en[6] ;
wire	\rv32.gpio2_io_out_en[7] ;
wire	\rv32.gpio3_io_out_data[0] ;
wire	\rv32.gpio3_io_out_data[1] ;
wire	\rv32.gpio3_io_out_data[2] ;
wire	\rv32.gpio3_io_out_data[3] ;
wire	\rv32.gpio3_io_out_data[4] ;
wire	\rv32.gpio3_io_out_data[5] ;
wire	\rv32.gpio3_io_out_data[6] ;
wire	\rv32.gpio3_io_out_data[7] ;
wire	\rv32.gpio3_io_out_en[0] ;
wire	\rv32.gpio3_io_out_en[1] ;
wire	\rv32.gpio3_io_out_en[2] ;
wire	\rv32.gpio3_io_out_en[3] ;
wire	\rv32.gpio3_io_out_en[4] ;
wire	\rv32.gpio3_io_out_en[5] ;
wire	\rv32.gpio3_io_out_en[6] ;
wire	\rv32.gpio3_io_out_en[7] ;
wire	\rv32.gpio4_io_out_data[0] ;
wire	\rv32.gpio4_io_out_data[1] ;
wire	\rv32.gpio4_io_out_data[2] ;
wire	\rv32.gpio4_io_out_data[3] ;
wire	\rv32.gpio4_io_out_data[4] ;
wire	\rv32.gpio4_io_out_data[5] ;
wire	\rv32.gpio4_io_out_data[6] ;
wire	\rv32.gpio4_io_out_data[7] ;
wire	\rv32.gpio4_io_out_en[0] ;
wire	\rv32.gpio4_io_out_en[1] ;
wire	\rv32.gpio4_io_out_en[2] ;
wire	\rv32.gpio4_io_out_en[3] ;
wire	\rv32.gpio4_io_out_en[4] ;
wire	\rv32.gpio4_io_out_en[5] ;
wire	\rv32.gpio4_io_out_en[6] ;
wire	\rv32.gpio4_io_out_en[7] ;
wire	\rv32.gpio5_io_out_data[0] ;
wire	\rv32.gpio5_io_out_data[1] ;
wire	\rv32.gpio5_io_out_data[2] ;
wire	\rv32.gpio5_io_out_data[3] ;
wire	\rv32.gpio5_io_out_data[4] ;
wire	\rv32.gpio5_io_out_data[5] ;
wire	\rv32.gpio5_io_out_data[6] ;
wire	\rv32.gpio5_io_out_data[7] ;
wire	\rv32.gpio5_io_out_en[0] ;
wire	\rv32.gpio5_io_out_en[1] ;
wire	\rv32.gpio5_io_out_en[2] ;
wire	\rv32.gpio5_io_out_en[3] ;
wire	\rv32.gpio5_io_out_en[4] ;
wire	\rv32.gpio5_io_out_en[5] ;
wire	\rv32.gpio5_io_out_en[6] ;
wire	\rv32.gpio5_io_out_en[7] ;
wire	\rv32.gpio6_io_out_data[0] ;
wire	\rv32.gpio6_io_out_data[1] ;
wire	\rv32.gpio6_io_out_data[2] ;
wire	\rv32.gpio6_io_out_data[3] ;
wire	\rv32.gpio6_io_out_data[4] ;
wire	\rv32.gpio6_io_out_data[5] ;
wire	\rv32.gpio6_io_out_data[6] ;
wire	\rv32.gpio6_io_out_data[7] ;
wire	\rv32.gpio6_io_out_en[0] ;
wire	\rv32.gpio6_io_out_en[1] ;
wire	\rv32.gpio6_io_out_en[2] ;
wire	\rv32.gpio6_io_out_en[3] ;
wire	\rv32.gpio6_io_out_en[4] ;
wire	\rv32.gpio6_io_out_en[5] ;
wire	\rv32.gpio6_io_out_en[6] ;
wire	\rv32.gpio6_io_out_en[7] ;
wire	\rv32.gpio7_io_out_data[0] ;
wire	\rv32.gpio7_io_out_data[1] ;
wire	\rv32.gpio7_io_out_data[2] ;
wire	\rv32.gpio7_io_out_data[3] ;
wire	\rv32.gpio7_io_out_data[4] ;
wire	\rv32.gpio7_io_out_data[5] ;
wire	\rv32.gpio7_io_out_data[6] ;
wire	\rv32.gpio7_io_out_data[7] ;
wire	\rv32.gpio7_io_out_en[0] ;
wire	\rv32.gpio7_io_out_en[1] ;
wire	\rv32.gpio7_io_out_en[2] ;
wire	\rv32.gpio7_io_out_en[3] ;
wire	\rv32.gpio7_io_out_en[4] ;
wire	\rv32.gpio7_io_out_en[5] ;
wire	\rv32.gpio7_io_out_en[6] ;
wire	\rv32.gpio7_io_out_en[7] ;
wire	\rv32.gpio8_io_out_data[0] ;
wire	\rv32.gpio8_io_out_data[1] ;
wire	\rv32.gpio8_io_out_data[2] ;
wire	\rv32.gpio8_io_out_data[3] ;
wire	\rv32.gpio8_io_out_data[4] ;
wire	\rv32.gpio8_io_out_data[5] ;
wire	\rv32.gpio8_io_out_data[6] ;
wire	\rv32.gpio8_io_out_data[7] ;
wire	\rv32.gpio8_io_out_en[0] ;
wire	\rv32.gpio8_io_out_en[1] ;
wire	\rv32.gpio8_io_out_en[2] ;
wire	\rv32.gpio8_io_out_en[3] ;
wire	\rv32.gpio8_io_out_en[4] ;
wire	\rv32.gpio8_io_out_en[5] ;
wire	\rv32.gpio8_io_out_en[6] ;
wire	\rv32.gpio8_io_out_en[7] ;
wire	\rv32.gpio9_io_out_data[0] ;
wire	\rv32.gpio9_io_out_data[1] ;
wire	\rv32.gpio9_io_out_data[2] ;
wire	\rv32.gpio9_io_out_data[3] ;
wire	\rv32.gpio9_io_out_data[4] ;
wire	\rv32.gpio9_io_out_data[5] ;
wire	\rv32.gpio9_io_out_data[6] ;
wire	\rv32.gpio9_io_out_data[7] ;
wire	\rv32.gpio9_io_out_en[0] ;
wire	\rv32.gpio9_io_out_en[1] ;
wire	\rv32.gpio9_io_out_en[2] ;
wire	\rv32.gpio9_io_out_en[3] ;
wire	\rv32.gpio9_io_out_en[4] ;
wire	\rv32.gpio9_io_out_en[5] ;
wire	\rv32.gpio9_io_out_en[6] ;
wire	\rv32.gpio9_io_out_en[7] ;
wire	\rv32.mem_ahb_haddr[0] ;
wire	\rv32.mem_ahb_haddr[10] ;
wire	\rv32.mem_ahb_haddr[11] ;
wire	\rv32.mem_ahb_haddr[12] ;
wire	\rv32.mem_ahb_haddr[13] ;
wire	\rv32.mem_ahb_haddr[14] ;
wire	\rv32.mem_ahb_haddr[15] ;
wire	\rv32.mem_ahb_haddr[16] ;
wire	\rv32.mem_ahb_haddr[17] ;
wire	\rv32.mem_ahb_haddr[18] ;
wire	\rv32.mem_ahb_haddr[19] ;
wire	\rv32.mem_ahb_haddr[1] ;
wire	\rv32.mem_ahb_haddr[20] ;
wire	\rv32.mem_ahb_haddr[21] ;
wire	\rv32.mem_ahb_haddr[22] ;
wire	\rv32.mem_ahb_haddr[23] ;
wire	\rv32.mem_ahb_haddr[24] ;
wire	\rv32.mem_ahb_haddr[25] ;
wire	\rv32.mem_ahb_haddr[26] ;
wire	\rv32.mem_ahb_haddr[27] ;
wire	\rv32.mem_ahb_haddr[28] ;
wire	\rv32.mem_ahb_haddr[29] ;
wire	\rv32.mem_ahb_haddr[2] ;
wire	\rv32.mem_ahb_haddr[30] ;
wire	\rv32.mem_ahb_haddr[31] ;
wire	\rv32.mem_ahb_haddr[3] ;
wire	\rv32.mem_ahb_haddr[4] ;
wire	\rv32.mem_ahb_haddr[5] ;
wire	\rv32.mem_ahb_haddr[6] ;
wire	\rv32.mem_ahb_haddr[7] ;
wire	\rv32.mem_ahb_haddr[8] ;
wire	\rv32.mem_ahb_haddr[9] ;
wire	\rv32.mem_ahb_hburst[0] ;
wire	\rv32.mem_ahb_hburst[1] ;
wire	\rv32.mem_ahb_hburst[2] ;
wire	\rv32.mem_ahb_hready ;
wire	\rv32.mem_ahb_hsize[0] ;
wire	\rv32.mem_ahb_hsize[1] ;
wire	\rv32.mem_ahb_hsize[2] ;
wire	\rv32.mem_ahb_htrans[0] ;
wire	\rv32.mem_ahb_htrans[1] ;
wire	\rv32.mem_ahb_hwdata[0] ;
wire	\rv32.mem_ahb_hwdata[10] ;
wire	\rv32.mem_ahb_hwdata[11] ;
wire	\rv32.mem_ahb_hwdata[12] ;
wire	\rv32.mem_ahb_hwdata[13] ;
wire	\rv32.mem_ahb_hwdata[14] ;
wire	\rv32.mem_ahb_hwdata[15] ;
wire	\rv32.mem_ahb_hwdata[16] ;
wire	\rv32.mem_ahb_hwdata[17] ;
wire	\rv32.mem_ahb_hwdata[18] ;
wire	\rv32.mem_ahb_hwdata[19] ;
wire	\rv32.mem_ahb_hwdata[1] ;
wire	\rv32.mem_ahb_hwdata[20] ;
wire	\rv32.mem_ahb_hwdata[21] ;
wire	\rv32.mem_ahb_hwdata[22] ;
wire	\rv32.mem_ahb_hwdata[23] ;
wire	\rv32.mem_ahb_hwdata[24] ;
wire	\rv32.mem_ahb_hwdata[25] ;
wire	\rv32.mem_ahb_hwdata[26] ;
wire	\rv32.mem_ahb_hwdata[27] ;
wire	\rv32.mem_ahb_hwdata[28] ;
wire	\rv32.mem_ahb_hwdata[29] ;
wire	\rv32.mem_ahb_hwdata[2] ;
wire	\rv32.mem_ahb_hwdata[30] ;
wire	\rv32.mem_ahb_hwdata[31] ;
wire	\rv32.mem_ahb_hwdata[3] ;
wire	\rv32.mem_ahb_hwdata[4] ;
wire	\rv32.mem_ahb_hwdata[5] ;
wire	\rv32.mem_ahb_hwdata[6] ;
wire	\rv32.mem_ahb_hwdata[7] ;
wire	\rv32.mem_ahb_hwdata[8] ;
wire	\rv32.mem_ahb_hwdata[9] ;
wire	\rv32.mem_ahb_hwrite ;
wire	\rv32.resetn_out ;
wire	\rv32.slave_ahb_hrdata[0] ;
wire	\rv32.slave_ahb_hrdata[10] ;
wire	\rv32.slave_ahb_hrdata[11] ;
wire	\rv32.slave_ahb_hrdata[12] ;
wire	\rv32.slave_ahb_hrdata[13] ;
wire	\rv32.slave_ahb_hrdata[14] ;
wire	\rv32.slave_ahb_hrdata[15] ;
wire	\rv32.slave_ahb_hrdata[16] ;
wire	\rv32.slave_ahb_hrdata[17] ;
wire	\rv32.slave_ahb_hrdata[18] ;
wire	\rv32.slave_ahb_hrdata[19] ;
wire	\rv32.slave_ahb_hrdata[1] ;
wire	\rv32.slave_ahb_hrdata[20] ;
wire	\rv32.slave_ahb_hrdata[21] ;
wire	\rv32.slave_ahb_hrdata[22] ;
wire	\rv32.slave_ahb_hrdata[23] ;
wire	\rv32.slave_ahb_hrdata[24] ;
wire	\rv32.slave_ahb_hrdata[25] ;
wire	\rv32.slave_ahb_hrdata[26] ;
wire	\rv32.slave_ahb_hrdata[27] ;
wire	\rv32.slave_ahb_hrdata[28] ;
wire	\rv32.slave_ahb_hrdata[29] ;
wire	\rv32.slave_ahb_hrdata[2] ;
wire	\rv32.slave_ahb_hrdata[30] ;
wire	\rv32.slave_ahb_hrdata[31] ;
wire	\rv32.slave_ahb_hrdata[3] ;
wire	\rv32.slave_ahb_hrdata[4] ;
wire	\rv32.slave_ahb_hrdata[5] ;
wire	\rv32.slave_ahb_hrdata[6] ;
wire	\rv32.slave_ahb_hrdata[7] ;
wire	\rv32.slave_ahb_hrdata[8] ;
wire	\rv32.slave_ahb_hrdata[9] ;
wire	\rv32.slave_ahb_hreadyout ;
wire	\rv32.slave_ahb_hresp ;
wire	\rv32.swj_JTAGIR[0] ;
wire	\rv32.swj_JTAGIR[1] ;
wire	\rv32.swj_JTAGIR[2] ;
wire	\rv32.swj_JTAGIR[3] ;
wire	\rv32.swj_JTAGNSW ;
wire	\rv32.swj_JTAGSTATE[0] ;
wire	\rv32.swj_JTAGSTATE[1] ;
wire	\rv32.swj_JTAGSTATE[2] ;
wire	\rv32.swj_JTAGSTATE[3] ;
wire	\rv32.sys_ctrl_clkSource[0] ;
wire	\rv32.sys_ctrl_clkSource[1] ;
wire	\rv32.sys_ctrl_hseBypass ;
wire	\rv32.sys_ctrl_hseEnable ;
wire	\rv32.sys_ctrl_pllEnable ;
wire	\rv32.sys_ctrl_sleep ;
wire	\rv32.sys_ctrl_standby ;
wire	\rv32.sys_ctrl_stop ;
wire	\sram_cs_n~input_o ;
wire	\sys_resetn~clkctrl_outclk ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ;
wire	\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ;
wire	\sys_resetn~combout ;
wire	\z80_addr[0]~input_o ;
wire	\z80_addr[10]~input_o ;
wire	\z80_addr[11]~input_o ;
wire	\z80_addr[12]~input_o ;
wire	\z80_addr[13]~input_o ;
wire	\z80_addr[14]~input_o ;
wire	\z80_addr[15]~input_o ;
wire	\z80_addr[1]~input_o ;
wire	\z80_addr[2]~input_o ;
wire	\z80_addr[3]~input_o ;
wire	\z80_addr[4]~input_o ;
wire	\z80_addr[5]~input_o ;
wire	\z80_addr[6]~input_o ;
wire	\z80_addr[7]~input_o ;
wire	\z80_addr[8]~input_o ;
wire	\z80_addr[9]~input_o ;
wire	\z80_data[0]~input_o ;
wire	\z80_data[1]~input_o ;
wire	\z80_data[2]~input_o ;
wire	\z80_data[3]~input_o ;
wire	\z80_data[4]~input_o ;
wire	\z80_data[5]~input_o ;
wire	\z80_data[6]~input_o ;
wire	\z80_data[7]~input_o ;
wire	\z80_rd_n~input_o ;
wire	\z80_wr_n~input_o ;
wire	\~GND~combout ;
wire	\~VCC~combout ;

wire vcc;
wire gnd;
assign vcc = 1'b1;
assign gnd = 1'b0;
wire unknown;
assign unknown = 1'bx;

alta_rio \PIN_HSE~input (
	.padio(PIN_HSE),
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\PIN_HSE~input_o ),
	.regout());
defparam \PIN_HSE~input .coord_x = 22;
defparam \PIN_HSE~input .coord_y = 4;
defparam \PIN_HSE~input .coord_z = 1;
defparam \PIN_HSE~input .IN_ASYNC_MODE = 1'b0;
defparam \PIN_HSE~input .IN_SYNC_MODE = 1'b0;
defparam \PIN_HSE~input .IN_POWERUP = 1'b0;
defparam \PIN_HSE~input .OUT_REG_MODE = 1'b0;
defparam \PIN_HSE~input .OUT_ASYNC_MODE = 1'b0;
defparam \PIN_HSE~input .OUT_SYNC_MODE = 1'b0;
defparam \PIN_HSE~input .OUT_POWERUP = 1'b0;
defparam \PIN_HSE~input .OE_REG_MODE = 1'b0;
defparam \PIN_HSE~input .OE_ASYNC_MODE = 1'b0;
defparam \PIN_HSE~input .OE_SYNC_MODE = 1'b0;
defparam \PIN_HSE~input .OE_POWERUP = 1'b0;
defparam \PIN_HSE~input .CFG_TRI_INPUT = 1'b0;
defparam \PIN_HSE~input .CFG_PULL_UP = 1'b0;
defparam \PIN_HSE~input .CFG_SLR = 1'b0;
defparam \PIN_HSE~input .CFG_OPEN_DRAIN = 1'b0;
defparam \PIN_HSE~input .CFG_PDRCTRL = 4'b0010;
defparam \PIN_HSE~input .CFG_KEEP = 2'b00;
defparam \PIN_HSE~input .CFG_LVDS_OUT_EN = 1'b0;
defparam \PIN_HSE~input .CFG_LVDS_SEL_CUA = 2'b00;
defparam \PIN_HSE~input .CFG_LVDS_IREF = 10'b0110000000;
defparam \PIN_HSE~input .CFG_LVDS_IN_EN = 1'b0;
defparam \PIN_HSE~input .DPCLK_DELAY = 4'b0000;
defparam \PIN_HSE~input .OUT_DELAY = 1'b0;
defparam \PIN_HSE~input .IN_DATA_DELAY = 3'b000;
defparam \PIN_HSE~input .IN_REG_DELAY = 3'b000;

alta_rio \PIN_HSI~input (
	.padio(PIN_HSI),
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\PIN_HSI~input_o ),
	.regout());
defparam \PIN_HSI~input .coord_x = 22;
defparam \PIN_HSI~input .coord_y = 4;
defparam \PIN_HSI~input .coord_z = 0;
defparam \PIN_HSI~input .IN_ASYNC_MODE = 1'b0;
defparam \PIN_HSI~input .IN_SYNC_MODE = 1'b0;
defparam \PIN_HSI~input .IN_POWERUP = 1'b0;
defparam \PIN_HSI~input .OUT_REG_MODE = 1'b0;
defparam \PIN_HSI~input .OUT_ASYNC_MODE = 1'b0;
defparam \PIN_HSI~input .OUT_SYNC_MODE = 1'b0;
defparam \PIN_HSI~input .OUT_POWERUP = 1'b0;
defparam \PIN_HSI~input .OE_REG_MODE = 1'b0;
defparam \PIN_HSI~input .OE_ASYNC_MODE = 1'b0;
defparam \PIN_HSI~input .OE_SYNC_MODE = 1'b0;
defparam \PIN_HSI~input .OE_POWERUP = 1'b0;
defparam \PIN_HSI~input .CFG_TRI_INPUT = 1'b0;
defparam \PIN_HSI~input .CFG_PULL_UP = 1'b0;
defparam \PIN_HSI~input .CFG_SLR = 1'b0;
defparam \PIN_HSI~input .CFG_OPEN_DRAIN = 1'b0;
defparam \PIN_HSI~input .CFG_PDRCTRL = 4'b0010;
defparam \PIN_HSI~input .CFG_KEEP = 2'b00;
defparam \PIN_HSI~input .CFG_LVDS_OUT_EN = 1'b0;
defparam \PIN_HSI~input .CFG_LVDS_SEL_CUA = 2'b00;
defparam \PIN_HSI~input .CFG_LVDS_IREF = 10'b0110000000;
defparam \PIN_HSI~input .CFG_LVDS_IN_EN = 1'b0;
defparam \PIN_HSI~input .DPCLK_DELAY = 4'b0000;
defparam \PIN_HSI~input .OUT_DELAY = 1'b0;
defparam \PIN_HSI~input .IN_DATA_DELAY = 3'b000;
defparam \PIN_HSI~input .IN_REG_DELAY = 3'b000;

alta_rio \PIN_OSC~input (
	.padio(PIN_OSC),
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\PIN_OSC~input_o ),
	.regout());
defparam \PIN_OSC~input .coord_x = 22;
defparam \PIN_OSC~input .coord_y = 4;
defparam \PIN_OSC~input .coord_z = 2;
defparam \PIN_OSC~input .IN_ASYNC_MODE = 1'b0;
defparam \PIN_OSC~input .IN_SYNC_MODE = 1'b0;
defparam \PIN_OSC~input .IN_POWERUP = 1'b0;
defparam \PIN_OSC~input .OUT_REG_MODE = 1'b0;
defparam \PIN_OSC~input .OUT_ASYNC_MODE = 1'b0;
defparam \PIN_OSC~input .OUT_SYNC_MODE = 1'b0;
defparam \PIN_OSC~input .OUT_POWERUP = 1'b0;
defparam \PIN_OSC~input .OE_REG_MODE = 1'b0;
defparam \PIN_OSC~input .OE_ASYNC_MODE = 1'b0;
defparam \PIN_OSC~input .OE_SYNC_MODE = 1'b0;
defparam \PIN_OSC~input .OE_POWERUP = 1'b0;
defparam \PIN_OSC~input .CFG_TRI_INPUT = 1'b0;
defparam \PIN_OSC~input .CFG_PULL_UP = 1'b0;
defparam \PIN_OSC~input .CFG_SLR = 1'b0;
defparam \PIN_OSC~input .CFG_OPEN_DRAIN = 1'b0;
defparam \PIN_OSC~input .CFG_PDRCTRL = 4'b0010;
defparam \PIN_OSC~input .CFG_KEEP = 2'b00;
defparam \PIN_OSC~input .CFG_LVDS_OUT_EN = 1'b0;
defparam \PIN_OSC~input .CFG_LVDS_SEL_CUA = 2'b00;
defparam \PIN_OSC~input .CFG_LVDS_IREF = 10'b0110000000;
defparam \PIN_OSC~input .CFG_LVDS_IN_EN = 1'b0;
defparam \PIN_OSC~input .DPCLK_DELAY = 4'b0000;
defparam \PIN_OSC~input .OUT_DELAY = 1'b0;
defparam \PIN_OSC~input .IN_DATA_DELAY = 3'b000;
defparam \PIN_OSC~input .IN_REG_DELAY = 3'b000;

alta_slice PLL_ENABLE(
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\rv32.sys_ctrl_pllEnable ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\PLL_ENABLE~combout ),
	.Cout(),
	.Q());
defparam PLL_ENABLE.coord_x = 17;
defparam PLL_ENABLE.coord_y = 5;
defparam PLL_ENABLE.coord_z = 14;
defparam PLL_ENABLE.mask = 16'h00FF;
defparam PLL_ENABLE.modeMux = 1'b0;
defparam PLL_ENABLE.FeedbackMux = 1'b0;
defparam PLL_ENABLE.ShiftMux = 1'b0;
defparam PLL_ENABLE.BypassEn = 1'b0;
defparam PLL_ENABLE.CarryEnb = 1'b1;

alta_io_gclk \PLL_ENABLE~clkctrl (
	.inclk(\PLL_ENABLE~combout ),
	.outclk(\PLL_ENABLE~clkctrl_outclk ));
defparam \PLL_ENABLE~clkctrl .coord_x = 22;
defparam \PLL_ENABLE~clkctrl .coord_y = 4;
defparam \PLL_ENABLE~clkctrl .coord_z = 4;

alta_slice PLL_LOCK(
	.A(\auto_generated_inst.hbo_13_f13ffbd025d547b8_bp ),
	.B(vcc),
	.C(vcc),
	.D(\pll_inst|auto_generated|pll_lock_sync~q ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\PLL_LOCK~combout ),
	.Cout(),
	.Q());
defparam PLL_LOCK.coord_x = 17;
defparam PLL_LOCK.coord_y = 5;
defparam PLL_LOCK.coord_z = 10;
defparam PLL_LOCK.mask = 16'hAA00;
defparam PLL_LOCK.modeMux = 1'b0;
defparam PLL_LOCK.FeedbackMux = 1'b0;
defparam PLL_LOCK.ShiftMux = 1'b0;
defparam PLL_LOCK.BypassEn = 1'b0;
defparam PLL_LOCK.CarryEnb = 1'b1;

alta_rio \UART0_UARTRXD~input (
	.padio(UART0_UARTRXD),
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\UART0_UARTRXD~input_o ),
	.regout());
defparam \UART0_UARTRXD~input .coord_x = 0;
defparam \UART0_UARTRXD~input .coord_y = 1;
defparam \UART0_UARTRXD~input .coord_z = 0;
defparam \UART0_UARTRXD~input .IN_ASYNC_MODE = 1'b0;
defparam \UART0_UARTRXD~input .IN_SYNC_MODE = 1'b0;
defparam \UART0_UARTRXD~input .IN_POWERUP = 1'b0;
defparam \UART0_UARTRXD~input .OUT_REG_MODE = 1'b0;
defparam \UART0_UARTRXD~input .OUT_ASYNC_MODE = 1'b0;
defparam \UART0_UARTRXD~input .OUT_SYNC_MODE = 1'b0;
defparam \UART0_UARTRXD~input .OUT_POWERUP = 1'b0;
defparam \UART0_UARTRXD~input .OE_REG_MODE = 1'b0;
defparam \UART0_UARTRXD~input .OE_ASYNC_MODE = 1'b0;
defparam \UART0_UARTRXD~input .OE_SYNC_MODE = 1'b0;
defparam \UART0_UARTRXD~input .OE_POWERUP = 1'b0;
defparam \UART0_UARTRXD~input .CFG_TRI_INPUT = 1'b0;
defparam \UART0_UARTRXD~input .CFG_INPUT_EN = 1'b1;
defparam \UART0_UARTRXD~input .CFG_PULL_UP = 1'b0;
defparam \UART0_UARTRXD~input .CFG_SLR = 1'b0;
defparam \UART0_UARTRXD~input .CFG_OPEN_DRAIN = 1'b0;
defparam \UART0_UARTRXD~input .CFG_PDRCTRL = 4'b0100;
defparam \UART0_UARTRXD~input .CFG_KEEP = 2'b00;
defparam \UART0_UARTRXD~input .CFG_LVDS_OUT_EN = 1'b0;
defparam \UART0_UARTRXD~input .CFG_LVDS_SEL_CUA = 2'b00;
defparam \UART0_UARTRXD~input .CFG_LVDS_IREF = 10'b0110000000;
defparam \UART0_UARTRXD~input .CFG_LVDS_IN_EN = 1'b0;
defparam \UART0_UARTRXD~input .DPCLK_DELAY = 4'b0000;
defparam \UART0_UARTRXD~input .OUT_DELAY = 1'b0;
defparam \UART0_UARTRXD~input .IN_DATA_DELAY = 3'b000;
defparam \UART0_UARTRXD~input .IN_REG_DELAY = 3'b000;

alta_rio \UART0_UARTTXD~output (
	.padio(UART0_UARTTXD),
	.datain(\rv32.gpio7_io_out_data[6] ),
	.oe(\rv32.gpio7_io_out_en[6] ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(),
	.regout());
defparam \UART0_UARTTXD~output .coord_x = 0;
defparam \UART0_UARTTXD~output .coord_y = 2;
defparam \UART0_UARTTXD~output .coord_z = 5;
defparam \UART0_UARTTXD~output .IN_ASYNC_MODE = 1'b0;
defparam \UART0_UARTTXD~output .IN_SYNC_MODE = 1'b0;
defparam \UART0_UARTTXD~output .IN_POWERUP = 1'b0;
defparam \UART0_UARTTXD~output .OUT_REG_MODE = 1'b0;
defparam \UART0_UARTTXD~output .OUT_ASYNC_MODE = 1'b0;
defparam \UART0_UARTTXD~output .OUT_SYNC_MODE = 1'b0;
defparam \UART0_UARTTXD~output .OUT_POWERUP = 1'b0;
defparam \UART0_UARTTXD~output .OE_REG_MODE = 1'b0;
defparam \UART0_UARTTXD~output .OE_ASYNC_MODE = 1'b0;
defparam \UART0_UARTTXD~output .OE_SYNC_MODE = 1'b0;
defparam \UART0_UARTTXD~output .OE_POWERUP = 1'b0;
defparam \UART0_UARTTXD~output .CFG_TRI_INPUT = 1'b0;
defparam \UART0_UARTTXD~output .CFG_INPUT_EN = 1'b0;
defparam \UART0_UARTTXD~output .CFG_PULL_UP = 1'b0;
defparam \UART0_UARTTXD~output .CFG_SLR = 1'b0;
defparam \UART0_UARTTXD~output .CFG_OPEN_DRAIN = 1'b0;
defparam \UART0_UARTTXD~output .CFG_PDRCTRL = 4'b0100;
defparam \UART0_UARTTXD~output .CFG_KEEP = 2'b00;
defparam \UART0_UARTTXD~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \UART0_UARTTXD~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \UART0_UARTTXD~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \UART0_UARTTXD~output .CFG_LVDS_IN_EN = 1'b0;
defparam \UART0_UARTTXD~output .DPCLK_DELAY = 4'b0000;
defparam \UART0_UARTTXD~output .OUT_DELAY = 1'b0;
defparam \UART0_UARTTXD~output .IN_DATA_DELAY = 3'b000;
defparam \UART0_UARTTXD~output .IN_REG_DELAY = 3'b000;

alta_asyncctrl asyncreset_ctrl_X49_Y1_N0(
	.Din(\PLL_ENABLE~clkctrl_outclk ),
	.Dout(\PLL_ENABLE~clkctrl_outclk__AsyncReset_X49_Y1_SIG ));
defparam asyncreset_ctrl_X49_Y1_N0.coord_x = 17;
defparam asyncreset_ctrl_X49_Y1_N0.coord_y = 5;
defparam asyncreset_ctrl_X49_Y1_N0.coord_z = 0;
defparam asyncreset_ctrl_X49_Y1_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X56_Y1_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ));
defparam asyncreset_ctrl_X56_Y1_N0.coord_x = 15;
defparam asyncreset_ctrl_X56_Y1_N0.coord_y = 10;
defparam asyncreset_ctrl_X56_Y1_N0.coord_z = 0;
defparam asyncreset_ctrl_X56_Y1_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X56_Y1_N1(
	.Din(),
	.Dout(AsyncReset_X56_Y1_GND));
defparam asyncreset_ctrl_X56_Y1_N1.coord_x = 15;
defparam asyncreset_ctrl_X56_Y1_N1.coord_y = 10;
defparam asyncreset_ctrl_X56_Y1_N1.coord_z = 1;
defparam asyncreset_ctrl_X56_Y1_N1.AsyncCtrlMux = 2'b00;

alta_asyncctrl asyncreset_ctrl_X56_Y2_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ));
defparam asyncreset_ctrl_X56_Y2_N0.coord_x = 18;
defparam asyncreset_ctrl_X56_Y2_N0.coord_y = 11;
defparam asyncreset_ctrl_X56_Y2_N0.coord_z = 0;
defparam asyncreset_ctrl_X56_Y2_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X56_Y3_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ));
defparam asyncreset_ctrl_X56_Y3_N0.coord_x = 14;
defparam asyncreset_ctrl_X56_Y3_N0.coord_y = 11;
defparam asyncreset_ctrl_X56_Y3_N0.coord_z = 0;
defparam asyncreset_ctrl_X56_Y3_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X57_Y1_N0(
	.Din(),
	.Dout(AsyncReset_X57_Y1_GND));
defparam asyncreset_ctrl_X57_Y1_N0.coord_x = 20;
defparam asyncreset_ctrl_X57_Y1_N0.coord_y = 10;
defparam asyncreset_ctrl_X57_Y1_N0.coord_z = 0;
defparam asyncreset_ctrl_X57_Y1_N0.AsyncCtrlMux = 2'b00;

alta_asyncctrl asyncreset_ctrl_X57_Y1_N1(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ));
defparam asyncreset_ctrl_X57_Y1_N1.coord_x = 20;
defparam asyncreset_ctrl_X57_Y1_N1.coord_y = 10;
defparam asyncreset_ctrl_X57_Y1_N1.coord_z = 1;
defparam asyncreset_ctrl_X57_Y1_N1.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X57_Y2_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ));
defparam asyncreset_ctrl_X57_Y2_N0.coord_x = 18;
defparam asyncreset_ctrl_X57_Y2_N0.coord_y = 10;
defparam asyncreset_ctrl_X57_Y2_N0.coord_z = 0;
defparam asyncreset_ctrl_X57_Y2_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X57_Y3_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ));
defparam asyncreset_ctrl_X57_Y3_N0.coord_x = 15;
defparam asyncreset_ctrl_X57_Y3_N0.coord_y = 9;
defparam asyncreset_ctrl_X57_Y3_N0.coord_z = 0;
defparam asyncreset_ctrl_X57_Y3_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X57_Y4_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ));
defparam asyncreset_ctrl_X57_Y4_N0.coord_x = 16;
defparam asyncreset_ctrl_X57_Y4_N0.coord_y = 11;
defparam asyncreset_ctrl_X57_Y4_N0.coord_z = 0;
defparam asyncreset_ctrl_X57_Y4_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X58_Y1_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ));
defparam asyncreset_ctrl_X58_Y1_N0.coord_x = 16;
defparam asyncreset_ctrl_X58_Y1_N0.coord_y = 12;
defparam asyncreset_ctrl_X58_Y1_N0.coord_z = 0;
defparam asyncreset_ctrl_X58_Y1_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X58_Y2_N0(
	.Din(),
	.Dout(AsyncReset_X58_Y2_GND));
defparam asyncreset_ctrl_X58_Y2_N0.coord_x = 17;
defparam asyncreset_ctrl_X58_Y2_N0.coord_y = 10;
defparam asyncreset_ctrl_X58_Y2_N0.coord_z = 0;
defparam asyncreset_ctrl_X58_Y2_N0.AsyncCtrlMux = 2'b00;

alta_asyncctrl asyncreset_ctrl_X58_Y2_N1(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ));
defparam asyncreset_ctrl_X58_Y2_N1.coord_x = 17;
defparam asyncreset_ctrl_X58_Y2_N1.coord_y = 10;
defparam asyncreset_ctrl_X58_Y2_N1.coord_z = 1;
defparam asyncreset_ctrl_X58_Y2_N1.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X58_Y3_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ));
defparam asyncreset_ctrl_X58_Y3_N0.coord_x = 16;
defparam asyncreset_ctrl_X58_Y3_N0.coord_y = 9;
defparam asyncreset_ctrl_X58_Y3_N0.coord_z = 0;
defparam asyncreset_ctrl_X58_Y3_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X59_Y1_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ));
defparam asyncreset_ctrl_X59_Y1_N0.coord_x = 15;
defparam asyncreset_ctrl_X59_Y1_N0.coord_y = 8;
defparam asyncreset_ctrl_X59_Y1_N0.coord_z = 0;
defparam asyncreset_ctrl_X59_Y1_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X59_Y2_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ));
defparam asyncreset_ctrl_X59_Y2_N0.coord_x = 16;
defparam asyncreset_ctrl_X59_Y2_N0.coord_y = 10;
defparam asyncreset_ctrl_X59_Y2_N0.coord_z = 0;
defparam asyncreset_ctrl_X59_Y2_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X59_Y3_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ));
defparam asyncreset_ctrl_X59_Y3_N0.coord_x = 14;
defparam asyncreset_ctrl_X59_Y3_N0.coord_y = 9;
defparam asyncreset_ctrl_X59_Y3_N0.coord_z = 0;
defparam asyncreset_ctrl_X59_Y3_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X59_Y4_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ));
defparam asyncreset_ctrl_X59_Y4_N0.coord_x = 14;
defparam asyncreset_ctrl_X59_Y4_N0.coord_y = 10;
defparam asyncreset_ctrl_X59_Y4_N0.coord_z = 0;
defparam asyncreset_ctrl_X59_Y4_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X60_Y1_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ));
defparam asyncreset_ctrl_X60_Y1_N0.coord_x = 14;
defparam asyncreset_ctrl_X60_Y1_N0.coord_y = 8;
defparam asyncreset_ctrl_X60_Y1_N0.coord_z = 0;
defparam asyncreset_ctrl_X60_Y1_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X60_Y1_N1(
	.Din(),
	.Dout(AsyncReset_X60_Y1_GND));
defparam asyncreset_ctrl_X60_Y1_N1.coord_x = 14;
defparam asyncreset_ctrl_X60_Y1_N1.coord_y = 8;
defparam asyncreset_ctrl_X60_Y1_N1.coord_z = 1;
defparam asyncreset_ctrl_X60_Y1_N1.AsyncCtrlMux = 2'b00;

alta_asyncctrl asyncreset_ctrl_X60_Y2_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ));
defparam asyncreset_ctrl_X60_Y2_N0.coord_x = 17;
defparam asyncreset_ctrl_X60_Y2_N0.coord_y = 12;
defparam asyncreset_ctrl_X60_Y2_N0.coord_z = 0;
defparam asyncreset_ctrl_X60_Y2_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X60_Y3_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ));
defparam asyncreset_ctrl_X60_Y3_N0.coord_x = 14;
defparam asyncreset_ctrl_X60_Y3_N0.coord_y = 12;
defparam asyncreset_ctrl_X60_Y3_N0.coord_z = 0;
defparam asyncreset_ctrl_X60_Y3_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X60_Y4_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ));
defparam asyncreset_ctrl_X60_Y4_N0.coord_x = 19;
defparam asyncreset_ctrl_X60_Y4_N0.coord_y = 10;
defparam asyncreset_ctrl_X60_Y4_N0.coord_z = 0;
defparam asyncreset_ctrl_X60_Y4_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X60_Y4_N1(
	.Din(),
	.Dout(AsyncReset_X60_Y4_GND));
defparam asyncreset_ctrl_X60_Y4_N1.coord_x = 19;
defparam asyncreset_ctrl_X60_Y4_N1.coord_y = 10;
defparam asyncreset_ctrl_X60_Y4_N1.coord_z = 1;
defparam asyncreset_ctrl_X60_Y4_N1.AsyncCtrlMux = 2'b00;

alta_asyncctrl asyncreset_ctrl_X61_Y1_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ));
defparam asyncreset_ctrl_X61_Y1_N0.coord_x = 16;
defparam asyncreset_ctrl_X61_Y1_N0.coord_y = 8;
defparam asyncreset_ctrl_X61_Y1_N0.coord_z = 0;
defparam asyncreset_ctrl_X61_Y1_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X61_Y2_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ));
defparam asyncreset_ctrl_X61_Y2_N0.coord_x = 18;
defparam asyncreset_ctrl_X61_Y2_N0.coord_y = 12;
defparam asyncreset_ctrl_X61_Y2_N0.coord_z = 0;
defparam asyncreset_ctrl_X61_Y2_N0.AsyncCtrlMux = 2'b10;

alta_asyncctrl asyncreset_ctrl_X61_Y2_N1(
	.Din(),
	.Dout(AsyncReset_X61_Y2_GND));
defparam asyncreset_ctrl_X61_Y2_N1.coord_x = 18;
defparam asyncreset_ctrl_X61_Y2_N1.coord_y = 12;
defparam asyncreset_ctrl_X61_Y2_N1.coord_z = 1;
defparam asyncreset_ctrl_X61_Y2_N1.AsyncCtrlMux = 2'b00;

alta_asyncctrl asyncreset_ctrl_X61_Y3_N0(
	.Din(\sys_resetn~clkctrl_outclk ),
	.Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ));
defparam asyncreset_ctrl_X61_Y3_N0.coord_x = 15;
defparam asyncreset_ctrl_X61_Y3_N0.coord_y = 12;
defparam asyncreset_ctrl_X61_Y3_N0.coord_z = 0;
defparam asyncreset_ctrl_X61_Y3_N0.AsyncCtrlMux = 2'b10;

alta_io_gclk bus_clk_gclk(
	.inclk(\pll_inst|auto_generated|pll1_CLK_bus [3]),
	.outclk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ));
defparam bus_clk_gclk.coord_x = 22;
defparam bus_clk_gclk.coord_y = 4;
defparam bus_clk_gclk.coord_z = 1;

alta_clkenctrl clken_ctrl_X49_Y1_N0(
	.ClkIn(\auto_generated_inst.hbo_13_f13ffbd025d547b8_bp ),
	.ClkEn(),
	.ClkOut(\auto_generated_inst.hbo_13_f13ffbd025d547b8_bp_X49_Y1_SIG_VCC ));
defparam clken_ctrl_X49_Y1_N0.coord_x = 17;
defparam clken_ctrl_X49_Y1_N0.coord_y = 5;
defparam clken_ctrl_X49_Y1_N0.coord_z = 0;
defparam clken_ctrl_X49_Y1_N0.ClkMux = 2'b10;
defparam clken_ctrl_X49_Y1_N0.ClkEnMux = 2'b01;

alta_clkenctrl clken_ctrl_X56_Y1_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_sram|sram_cs_n~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_cs_n~0_combout_X56_Y1_SIG_SIG ));
defparam clken_ctrl_X56_Y1_N0.coord_x = 15;
defparam clken_ctrl_X56_Y1_N0.coord_y = 10;
defparam clken_ctrl_X56_Y1_N0.coord_z = 0;
defparam clken_ctrl_X56_Y1_N0.ClkMux = 2'b10;
defparam clken_ctrl_X56_Y1_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X56_Y1_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_sram|sram_addr[0]~1_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X56_Y1_SIG_SIG ));
defparam clken_ctrl_X56_Y1_N1.coord_x = 15;
defparam clken_ctrl_X56_Y1_N1.coord_y = 10;
defparam clken_ctrl_X56_Y1_N1.coord_z = 1;
defparam clken_ctrl_X56_Y1_N1.ClkMux = 2'b10;
defparam clken_ctrl_X56_Y1_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X56_Y2_N0(
	.ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
	.ClkEn(\macro_inst|ahb2apb_inst|always0~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X56_Y2_SIG_SIG ));
defparam clken_ctrl_X56_Y2_N0.coord_x = 18;
defparam clken_ctrl_X56_Y2_N0.coord_y = 11;
defparam clken_ctrl_X56_Y2_N0.coord_z = 0;
defparam clken_ctrl_X56_Y2_N0.ClkMux = 2'b10;
defparam clken_ctrl_X56_Y2_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X56_Y2_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|ahb2apb_inst|paddr[23]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X56_Y2_SIG_SIG ));
defparam clken_ctrl_X56_Y2_N1.coord_x = 18;
defparam clken_ctrl_X56_Y2_N1.coord_y = 11;
defparam clken_ctrl_X56_Y2_N1.coord_z = 1;
defparam clken_ctrl_X56_Y2_N1.ClkMux = 2'b10;
defparam clken_ctrl_X56_Y2_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X56_Y3_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|ahb2apb_inst|apb_pdone~combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ));
defparam clken_ctrl_X56_Y3_N0.coord_x = 14;
defparam clken_ctrl_X56_Y3_N0.coord_y = 11;
defparam clken_ctrl_X56_Y3_N0.coord_z = 0;
defparam clken_ctrl_X56_Y3_N0.ClkMux = 2'b10;
defparam clken_ctrl_X56_Y3_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X57_Y1_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_sram|sram_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_out[0]~0_combout_X57_Y1_SIG_SIG ));
defparam clken_ctrl_X57_Y1_N0.coord_x = 20;
defparam clken_ctrl_X57_Y1_N0.coord_y = 10;
defparam clken_ctrl_X57_Y1_N0.coord_z = 0;
defparam clken_ctrl_X57_Y1_N0.ClkMux = 2'b10;
defparam clken_ctrl_X57_Y1_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X57_Y1_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|ahb2apb_inst|apb_pdone~combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X57_Y1_SIG_SIG ));
defparam clken_ctrl_X57_Y1_N1.coord_x = 20;
defparam clken_ctrl_X57_Y1_N1.coord_y = 10;
defparam clken_ctrl_X57_Y1_N1.coord_z = 1;
defparam clken_ctrl_X57_Y1_N1.ClkMux = 2'b10;
defparam clken_ctrl_X57_Y1_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X57_Y2_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|ahb2apb_inst|paddr[23]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X57_Y2_SIG_SIG ));
defparam clken_ctrl_X57_Y2_N0.coord_x = 18;
defparam clken_ctrl_X57_Y2_N0.coord_y = 10;
defparam clken_ctrl_X57_Y2_N0.coord_z = 0;
defparam clken_ctrl_X57_Y2_N0.ClkMux = 2'b10;
defparam clken_ctrl_X57_Y2_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X57_Y2_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg2|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y2_SIG_SIG ));
defparam clken_ctrl_X57_Y2_N1.coord_x = 18;
defparam clken_ctrl_X57_Y2_N1.coord_y = 10;
defparam clken_ctrl_X57_Y2_N1.coord_z = 1;
defparam clken_ctrl_X57_Y2_N1.ClkMux = 2'b10;
defparam clken_ctrl_X57_Y2_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X57_Y3_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg2|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ));
defparam clken_ctrl_X57_Y3_N0.coord_x = 15;
defparam clken_ctrl_X57_Y3_N0.coord_y = 9;
defparam clken_ctrl_X57_Y3_N0.coord_z = 0;
defparam clken_ctrl_X57_Y3_N0.ClkMux = 2'b10;
defparam clken_ctrl_X57_Y3_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X57_Y3_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg1|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X57_Y3_SIG_SIG ));
defparam clken_ctrl_X57_Y3_N1.coord_x = 15;
defparam clken_ctrl_X57_Y3_N1.coord_y = 9;
defparam clken_ctrl_X57_Y3_N1.coord_z = 1;
defparam clken_ctrl_X57_Y3_N1.ClkMux = 2'b10;
defparam clken_ctrl_X57_Y3_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X57_Y4_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ));
defparam clken_ctrl_X57_Y4_N0.coord_x = 16;
defparam clken_ctrl_X57_Y4_N0.coord_y = 11;
defparam clken_ctrl_X57_Y4_N0.coord_z = 0;
defparam clken_ctrl_X57_Y4_N0.ClkMux = 2'b10;
defparam clken_ctrl_X57_Y4_N0.ClkEnMux = 2'b01;

alta_clkenctrl clken_ctrl_X58_Y1_N0(
	.ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
	.ClkEn(\macro_inst|ahb2apb_inst|always0~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X58_Y1_SIG_SIG ));
defparam clken_ctrl_X58_Y1_N0.coord_x = 16;
defparam clken_ctrl_X58_Y1_N0.coord_y = 12;
defparam clken_ctrl_X58_Y1_N0.coord_z = 0;
defparam clken_ctrl_X58_Y1_N0.ClkMux = 2'b10;
defparam clken_ctrl_X58_Y1_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X58_Y1_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg0|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y1_SIG_SIG ));
defparam clken_ctrl_X58_Y1_N1.coord_x = 16;
defparam clken_ctrl_X58_Y1_N1.coord_y = 12;
defparam clken_ctrl_X58_Y1_N1.coord_z = 1;
defparam clken_ctrl_X58_Y1_N1.ClkMux = 2'b10;
defparam clken_ctrl_X58_Y1_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X58_Y2_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\sys_resetn~clkctrl_outclk ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__sys_resetn~clkctrl_outclk_X58_Y2_SIG_INV ));
defparam clken_ctrl_X58_Y2_N0.coord_x = 17;
defparam clken_ctrl_X58_Y2_N0.coord_y = 10;
defparam clken_ctrl_X58_Y2_N0.coord_z = 0;
defparam clken_ctrl_X58_Y2_N0.ClkMux = 2'b10;
defparam clken_ctrl_X58_Y2_N0.ClkEnMux = 2'b11;

alta_clkenctrl clken_ctrl_X58_Y2_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|ahb2apb_inst|paddr[23]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X58_Y2_SIG_SIG ));
defparam clken_ctrl_X58_Y2_N1.coord_x = 17;
defparam clken_ctrl_X58_Y2_N1.coord_y = 10;
defparam clken_ctrl_X58_Y2_N1.coord_z = 1;
defparam clken_ctrl_X58_Y2_N1.ClkMux = 2'b10;
defparam clken_ctrl_X58_Y2_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X58_Y3_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg0|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y3_SIG_SIG ));
defparam clken_ctrl_X58_Y3_N0.coord_x = 16;
defparam clken_ctrl_X58_Y3_N0.coord_y = 9;
defparam clken_ctrl_X58_Y3_N0.coord_z = 0;
defparam clken_ctrl_X58_Y3_N0.ClkMux = 2'b10;
defparam clken_ctrl_X58_Y3_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X58_Y3_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg1|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X58_Y3_SIG_SIG ));
defparam clken_ctrl_X58_Y3_N1.coord_x = 16;
defparam clken_ctrl_X58_Y3_N1.coord_y = 9;
defparam clken_ctrl_X58_Y3_N1.coord_z = 1;
defparam clken_ctrl_X58_Y3_N1.ClkMux = 2'b10;
defparam clken_ctrl_X58_Y3_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X59_Y1_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg2|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X59_Y1_SIG_SIG ));
defparam clken_ctrl_X59_Y1_N0.coord_x = 15;
defparam clken_ctrl_X59_Y1_N0.coord_y = 8;
defparam clken_ctrl_X59_Y1_N0.coord_z = 0;
defparam clken_ctrl_X59_Y1_N0.ClkMux = 2'b10;
defparam clken_ctrl_X59_Y1_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X59_Y1_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg1|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y1_SIG_SIG ));
defparam clken_ctrl_X59_Y1_N1.coord_x = 15;
defparam clken_ctrl_X59_Y1_N1.coord_y = 8;
defparam clken_ctrl_X59_Y1_N1.coord_z = 1;
defparam clken_ctrl_X59_Y1_N1.ClkMux = 2'b10;
defparam clken_ctrl_X59_Y1_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X59_Y2_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg1|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y2_SIG_SIG ));
defparam clken_ctrl_X59_Y2_N0.coord_x = 16;
defparam clken_ctrl_X59_Y2_N0.coord_y = 10;
defparam clken_ctrl_X59_Y2_N0.coord_z = 0;
defparam clken_ctrl_X59_Y2_N0.ClkMux = 2'b10;
defparam clken_ctrl_X59_Y2_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X59_Y2_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg0|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X59_Y2_SIG_SIG ));
defparam clken_ctrl_X59_Y2_N1.coord_x = 16;
defparam clken_ctrl_X59_Y2_N1.coord_y = 10;
defparam clken_ctrl_X59_Y2_N1.coord_z = 1;
defparam clken_ctrl_X59_Y2_N1.ClkMux = 2'b10;
defparam clken_ctrl_X59_Y2_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X59_Y3_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg_sram_addr|reg_out[23]~35_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ));
defparam clken_ctrl_X59_Y3_N0.coord_x = 14;
defparam clken_ctrl_X59_Y3_N0.coord_y = 9;
defparam clken_ctrl_X59_Y3_N0.coord_z = 0;
defparam clken_ctrl_X59_Y3_N0.ClkMux = 2'b10;
defparam clken_ctrl_X59_Y3_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X59_Y4_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg_sram_addr|reg_out[23]~35_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ));
defparam clken_ctrl_X59_Y4_N0.coord_x = 14;
defparam clken_ctrl_X59_Y4_N0.coord_y = 10;
defparam clken_ctrl_X59_Y4_N0.coord_z = 0;
defparam clken_ctrl_X59_Y4_N0.ClkMux = 2'b10;
defparam clken_ctrl_X59_Y4_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X60_Y1_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|ahb2apb_inst|apb_pdone~combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y1_SIG_SIG ));
defparam clken_ctrl_X60_Y1_N0.coord_x = 14;
defparam clken_ctrl_X60_Y1_N0.coord_y = 8;
defparam clken_ctrl_X60_Y1_N0.coord_z = 0;
defparam clken_ctrl_X60_Y1_N0.ClkMux = 2'b10;
defparam clken_ctrl_X60_Y1_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X60_Y1_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_sram|sram_addr[0]~1_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y1_SIG_SIG ));
defparam clken_ctrl_X60_Y1_N1.coord_x = 14;
defparam clken_ctrl_X60_Y1_N1.coord_y = 8;
defparam clken_ctrl_X60_Y1_N1.coord_z = 1;
defparam clken_ctrl_X60_Y1_N1.ClkMux = 2'b10;
defparam clken_ctrl_X60_Y1_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X60_Y2_N0(
	.ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
	.ClkEn(),
	.ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y2_SIG_VCC ));
defparam clken_ctrl_X60_Y2_N0.coord_x = 17;
defparam clken_ctrl_X60_Y2_N0.coord_y = 12;
defparam clken_ctrl_X60_Y2_N0.coord_z = 0;
defparam clken_ctrl_X60_Y2_N0.ClkMux = 2'b10;
defparam clken_ctrl_X60_Y2_N0.ClkEnMux = 2'b01;

alta_clkenctrl clken_ctrl_X60_Y2_N1(
	.ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
	.ClkEn(\macro_inst|ahb2apb_inst|always0~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y2_SIG_SIG ));
defparam clken_ctrl_X60_Y2_N1.coord_x = 17;
defparam clken_ctrl_X60_Y2_N1.coord_y = 12;
defparam clken_ctrl_X60_Y2_N1.coord_z = 1;
defparam clken_ctrl_X60_Y2_N1.ClkMux = 2'b10;
defparam clken_ctrl_X60_Y2_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X60_Y3_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg1|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X60_Y3_SIG_SIG ));
defparam clken_ctrl_X60_Y3_N0.coord_x = 14;
defparam clken_ctrl_X60_Y3_N0.coord_y = 12;
defparam clken_ctrl_X60_Y3_N0.coord_z = 0;
defparam clken_ctrl_X60_Y3_N0.ClkMux = 2'b10;
defparam clken_ctrl_X60_Y3_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X60_Y3_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|ahb2apb_inst|apb_pdone~combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y3_SIG_SIG ));
defparam clken_ctrl_X60_Y3_N1.coord_x = 14;
defparam clken_ctrl_X60_Y3_N1.coord_y = 12;
defparam clken_ctrl_X60_Y3_N1.coord_z = 1;
defparam clken_ctrl_X60_Y3_N1.ClkMux = 2'b10;
defparam clken_ctrl_X60_Y3_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X60_Y4_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_sram|prdata[0]~1_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|prdata[0]~1_combout_X60_Y4_SIG_SIG ));
defparam clken_ctrl_X60_Y4_N0.coord_x = 19;
defparam clken_ctrl_X60_Y4_N0.coord_y = 10;
defparam clken_ctrl_X60_Y4_N0.coord_z = 0;
defparam clken_ctrl_X60_Y4_N0.ClkMux = 2'b10;
defparam clken_ctrl_X60_Y4_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X60_Y4_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_sram|sram_addr[0]~1_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y4_SIG_SIG ));
defparam clken_ctrl_X60_Y4_N1.coord_x = 19;
defparam clken_ctrl_X60_Y4_N1.coord_y = 10;
defparam clken_ctrl_X60_Y4_N1.coord_z = 1;
defparam clken_ctrl_X60_Y4_N1.ClkMux = 2'b10;
defparam clken_ctrl_X60_Y4_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X61_Y1_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg0|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y1_SIG_SIG ));
defparam clken_ctrl_X61_Y1_N0.coord_x = 16;
defparam clken_ctrl_X61_Y1_N0.coord_y = 8;
defparam clken_ctrl_X61_Y1_N0.coord_z = 0;
defparam clken_ctrl_X61_Y1_N0.ClkMux = 2'b10;
defparam clken_ctrl_X61_Y1_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X61_Y1_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg1|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X61_Y1_SIG_SIG ));
defparam clken_ctrl_X61_Y1_N1.coord_x = 16;
defparam clken_ctrl_X61_Y1_N1.coord_y = 8;
defparam clken_ctrl_X61_Y1_N1.coord_z = 1;
defparam clken_ctrl_X61_Y1_N1.ClkMux = 2'b10;
defparam clken_ctrl_X61_Y1_N1.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X61_Y2_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y2_SIG_VCC ));
defparam clken_ctrl_X61_Y2_N0.coord_x = 18;
defparam clken_ctrl_X61_Y2_N0.coord_y = 12;
defparam clken_ctrl_X61_Y2_N0.coord_z = 0;
defparam clken_ctrl_X61_Y2_N0.ClkMux = 2'b10;
defparam clken_ctrl_X61_Y2_N0.ClkEnMux = 2'b01;

alta_clkenctrl clken_ctrl_X61_Y2_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\sys_resetn~clkctrl_outclk ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__sys_resetn~clkctrl_outclk_X61_Y2_SIG_INV ));
defparam clken_ctrl_X61_Y2_N1.coord_x = 18;
defparam clken_ctrl_X61_Y2_N1.coord_y = 12;
defparam clken_ctrl_X61_Y2_N1.coord_z = 1;
defparam clken_ctrl_X61_Y2_N1.ClkMux = 2'b10;
defparam clken_ctrl_X61_Y2_N1.ClkEnMux = 2'b11;

alta_clkenctrl clken_ctrl_X61_Y3_N0(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg2|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X61_Y3_SIG_SIG ));
defparam clken_ctrl_X61_Y3_N0.coord_x = 15;
defparam clken_ctrl_X61_Y3_N0.coord_y = 12;
defparam clken_ctrl_X61_Y3_N0.coord_z = 0;
defparam clken_ctrl_X61_Y3_N0.ClkMux = 2'b10;
defparam clken_ctrl_X61_Y3_N0.ClkEnMux = 2'b10;

alta_clkenctrl clken_ctrl_X61_Y3_N1(
	.ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
	.ClkEn(\macro_inst|u_reg0|reg_out[0]~0_combout ),
	.ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y3_SIG_SIG ));
defparam clken_ctrl_X61_Y3_N1.coord_x = 15;
defparam clken_ctrl_X61_Y3_N1.coord_y = 12;
defparam clken_ctrl_X61_Y3_N1.coord_z = 1;
defparam clken_ctrl_X61_Y3_N1.ClkMux = 2'b10;
defparam clken_ctrl_X61_Y3_N1.ClkEnMux = 2'b10;

alta_io_gclk \gclksw_inst|gclk_switch (
	.inclk(\gclksw_inst|gclk_switch__alta_gclksw__clkout ),
	.outclk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ));
defparam \gclksw_inst|gclk_switch .coord_x = 22;
defparam \gclksw_inst|gclk_switch .coord_y = 4;
defparam \gclksw_inst|gclk_switch .coord_z = 5;

alta_gclksw \gclksw_inst|gclk_switch__alta_gclksw (
	.resetn(\rv32.resetn_out ),
	.clkin0(\PIN_HSI~input_o ),
	.clkin1(\PIN_HSE~input_o ),
	.clkin2(\pll_inst|auto_generated|pll1_CLK_bus [0]),
	.clkin3(1'bx),
	.select({\rv32.sys_ctrl_clkSource[1] , \rv32.sys_ctrl_clkSource[0] }),
	.clkout(\gclksw_inst|gclk_switch__alta_gclksw__clkout ));
defparam \gclksw_inst|gclk_switch__alta_gclksw .coord_x = 22;
defparam \gclksw_inst|gclk_switch__alta_gclksw .coord_y = 4;
defparam \gclksw_inst|gclk_switch__alta_gclksw .coord_z = 0;

alta_slice \macro_inst|Equal0~2 (
	.A(\macro_inst|ahb2apb_inst|paddr [6]),
	.B(vcc),
	.C(\macro_inst|ahb2apb_inst|paddr [7]),
	.D(\macro_inst|ahb2apb_inst|paddr [4]),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|Equal0~2_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|Equal0~2 .coord_x = 17;
defparam \macro_inst|Equal0~2 .coord_y = 10;
defparam \macro_inst|Equal0~2 .coord_z = 3;
defparam \macro_inst|Equal0~2 .mask = 16'h0005;
defparam \macro_inst|Equal0~2 .modeMux = 1'b0;
defparam \macro_inst|Equal0~2 .FeedbackMux = 1'b0;
defparam \macro_inst|Equal0~2 .ShiftMux = 1'b0;
defparam \macro_inst|Equal0~2 .BypassEn = 1'b0;
defparam \macro_inst|Equal0~2 .CarryEnb = 1'b1;

alta_slice \macro_inst|Equal0~7 (
	.A(\macro_inst|Equal0~5_combout ),
	.B(\macro_inst|Equal0~3_combout ),
	.C(\macro_inst|Equal0~6_combout ),
	.D(\macro_inst|Equal0~4_combout ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|Equal0~7_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|Equal0~7 .coord_x = 18;
defparam \macro_inst|Equal0~7 .coord_y = 10;
defparam \macro_inst|Equal0~7 .coord_z = 2;
defparam \macro_inst|Equal0~7 .mask = 16'h8000;
defparam \macro_inst|Equal0~7 .modeMux = 1'b0;
defparam \macro_inst|Equal0~7 .FeedbackMux = 1'b0;
defparam \macro_inst|Equal0~7 .ShiftMux = 1'b0;
defparam \macro_inst|Equal0~7 .BypassEn = 1'b0;
defparam \macro_inst|Equal0~7 .CarryEnb = 1'b1;

alta_slice \macro_inst|Equal0~8 (
	.A(\macro_inst|ahb2apb_inst|paddr [5]),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|ahb2apb_inst|paddr [3]),
	.D(\macro_inst|Equal0~9_combout ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|Equal0~8_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|Equal0~8 .coord_x = 17;
defparam \macro_inst|Equal0~8 .coord_y = 10;
defparam \macro_inst|Equal0~8 .coord_z = 14;
defparam \macro_inst|Equal0~8 .mask = 16'h0100;
defparam \macro_inst|Equal0~8 .modeMux = 1'b0;
defparam \macro_inst|Equal0~8 .FeedbackMux = 1'b0;
defparam \macro_inst|Equal0~8 .ShiftMux = 1'b0;
defparam \macro_inst|Equal0~8 .BypassEn = 1'b0;
defparam \macro_inst|Equal0~8 .CarryEnb = 1'b1;

alta_slice \macro_inst|Equal1~1 (
	.A(\macro_inst|Equal1~0_combout ),
	.B(\macro_inst|Equal0~2_combout ),
	.C(\macro_inst|ahb2apb_inst|paddr [3]),
	.D(\macro_inst|Equal0~7_combout ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|Equal1~1_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|Equal1~1 .coord_x = 17;
defparam \macro_inst|Equal1~1 .coord_y = 10;
defparam \macro_inst|Equal1~1 .coord_z = 2;
defparam \macro_inst|Equal1~1 .mask = 16'h0800;
defparam \macro_inst|Equal1~1 .modeMux = 1'b0;
defparam \macro_inst|Equal1~1 .FeedbackMux = 1'b0;
defparam \macro_inst|Equal1~1 .ShiftMux = 1'b0;
defparam \macro_inst|Equal1~1 .BypassEn = 1'b0;
defparam \macro_inst|Equal1~1 .CarryEnb = 1'b1;

alta_slice \macro_inst|Equal2~1 (
	.A(\macro_inst|ahb2apb_inst|paddr [5]),
	.B(\macro_inst|Equal2~0_combout ),
	.C(\macro_inst|Equal0~2_combout ),
	.D(\macro_inst|Equal0~7_combout ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|Equal2~1_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|Equal2~1 .coord_x = 17;
defparam \macro_inst|Equal2~1 .coord_y = 12;
defparam \macro_inst|Equal2~1 .coord_z = 4;
defparam \macro_inst|Equal2~1 .mask = 16'h4000;
defparam \macro_inst|Equal2~1 .modeMux = 1'b0;
defparam \macro_inst|Equal2~1 .FeedbackMux = 1'b0;
defparam \macro_inst|Equal2~1 .ShiftMux = 1'b0;
defparam \macro_inst|Equal2~1 .BypassEn = 1'b0;
defparam \macro_inst|Equal2~1 .CarryEnb = 1'b1;

alta_slice \macro_inst|Equal3~0 (
	.A(\macro_inst|ahb2apb_inst|paddr [5]),
	.B(\macro_inst|Equal0~7_combout ),
	.C(\macro_inst|Equal0~2_combout ),
	.D(\macro_inst|ahb2apb_inst|paddr [3]),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|Equal3~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|Equal3~0 .coord_x = 17;
defparam \macro_inst|Equal3~0 .coord_y = 12;
defparam \macro_inst|Equal3~0 .coord_z = 12;
defparam \macro_inst|Equal3~0 .mask = 16'h0080;
defparam \macro_inst|Equal3~0 .modeMux = 1'b0;
defparam \macro_inst|Equal3~0 .FeedbackMux = 1'b0;
defparam \macro_inst|Equal3~0 .ShiftMux = 1'b0;
defparam \macro_inst|Equal3~0 .BypassEn = 1'b0;
defparam \macro_inst|Equal3~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|Selector32~0 (
	.A(\macro_inst|u_reg0|pready~q ),
	.B(\macro_inst|u_reg1|pready~q ),
	.C(\macro_inst|Equal1~1_combout ),
	.D(\macro_inst|Equal0~8_combout ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|Selector32~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|Selector32~0 .coord_x = 16;
defparam \macro_inst|Selector32~0 .coord_y = 10;
defparam \macro_inst|Selector32~0 .coord_z = 15;
defparam \macro_inst|Selector32~0 .mask = 16'h8ACF;
defparam \macro_inst|Selector32~0 .modeMux = 1'b0;
defparam \macro_inst|Selector32~0 .FeedbackMux = 1'b0;
defparam \macro_inst|Selector32~0 .ShiftMux = 1'b0;
defparam \macro_inst|Selector32~0 .BypassEn = 1'b0;
defparam \macro_inst|Selector32~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|Selector32~1 (
	.A(\macro_inst|u_reg_sram_addr|pready~q ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|ahb2apb_inst|paddr [3]),
	.D(\macro_inst|u_sram|pready~q ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|Selector32~1_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|Selector32~1 .coord_x = 17;
defparam \macro_inst|Selector32~1 .coord_y = 10;
defparam \macro_inst|Selector32~1 .coord_z = 11;
defparam \macro_inst|Selector32~1 .mask = 16'hF2FE;
defparam \macro_inst|Selector32~1 .modeMux = 1'b0;
defparam \macro_inst|Selector32~1 .FeedbackMux = 1'b0;
defparam \macro_inst|Selector32~1 .ShiftMux = 1'b0;
defparam \macro_inst|Selector32~1 .BypassEn = 1'b0;
defparam \macro_inst|Selector32~1 .CarryEnb = 1'b1;

alta_slice \macro_inst|Selector32~2 (
	.A(\macro_inst|Equal0~2_combout ),
	.B(\macro_inst|Selector32~1_combout ),
	.C(\macro_inst|ahb2apb_inst|paddr [5]),
	.D(\macro_inst|Equal0~7_combout ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|Selector32~2_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|Selector32~2 .coord_x = 17;
defparam \macro_inst|Selector32~2 .coord_y = 12;
defparam \macro_inst|Selector32~2 .coord_z = 9;
defparam \macro_inst|Selector32~2 .mask = 16'hDFFF;
defparam \macro_inst|Selector32~2 .modeMux = 1'b0;
defparam \macro_inst|Selector32~2 .FeedbackMux = 1'b0;
defparam \macro_inst|Selector32~2 .ShiftMux = 1'b0;
defparam \macro_inst|Selector32~2 .BypassEn = 1'b0;
defparam \macro_inst|Selector32~2 .CarryEnb = 1'b1;

alta_slice \macro_inst|WideNor0~1 (
	.A(\macro_inst|ahb2apb_inst|paddr [5]),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|ahb2apb_inst|paddr [3]),
	.D(\macro_inst|Equal0~9_combout ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|WideNor0~1_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|WideNor0~1 .coord_x = 17;
defparam \macro_inst|WideNor0~1 .coord_y = 10;
defparam \macro_inst|WideNor0~1 .coord_z = 10;
defparam \macro_inst|WideNor0~1 .mask = 16'h1F00;
defparam \macro_inst|WideNor0~1 .modeMux = 1'b0;
defparam \macro_inst|WideNor0~1 .FeedbackMux = 1'b0;
defparam \macro_inst|WideNor0~1 .ShiftMux = 1'b0;
defparam \macro_inst|WideNor0~1 .BypassEn = 1'b0;
defparam \macro_inst|WideNor0~1 .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|apbState.apbAccess (
	.A(\macro_inst|ahb2apb_inst|apbState.apbSetup~q ),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|apb_pready~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|apbState.apbAccess~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|Selector2~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|apbState.apbAccess~q ));
defparam \macro_inst|ahb2apb_inst|apbState.apbAccess .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|apbState.apbAccess .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|apbState.apbAccess .coord_z = 12;
defparam \macro_inst|ahb2apb_inst|apbState.apbAccess .mask = 16'hAAFA;
defparam \macro_inst|ahb2apb_inst|apbState.apbAccess .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|apbState.apbAccess .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|apbState.apbAccess .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|apbState.apbAccess .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|apbState.apbAccess .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|apbState.apbIdle (
	.A(\macro_inst|ahb2apb_inst|apbState.apbAccess~q ),
	.B(\macro_inst|ahb2apb_inst|pvalid~q ),
	.C(vcc),
	.D(\macro_inst|apb_pready~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|apbState.apbIdle~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|Selector0~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|apbState.apbIdle~q ));
defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .coord_z = 13;
defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .mask = 16'hDCFC;
defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|apbState.apbSetup (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|paddr[23]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|apbState.apbSetup~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|apbState.apbSetup~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|apbState.apbSetup~q ));
defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .coord_z = 14;
defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|apb_pdone (
	.A(\macro_inst|ahb2apb_inst|penable~q ),
	.B(\macro_inst|ahb2apb_inst|psel~q ),
	.C(\macro_inst|Selector32~3_combout ),
	.D(\macro_inst|Selector32~0_combout ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|apb_pdone~combout ),
	.Cout(),
	.Q());
defparam \macro_inst|ahb2apb_inst|apb_pdone .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|apb_pdone .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|apb_pdone .coord_z = 13;
defparam \macro_inst|ahb2apb_inst|apb_pdone .mask = 16'h8000;
defparam \macro_inst|ahb2apb_inst|apb_pdone .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|apb_pdone .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|apb_pdone .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|apb_pdone .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|apb_pdone .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[10] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[10] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [10]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[10]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [10]));
defparam \macro_inst|ahb2apb_inst|haddr[10] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|haddr[10] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|haddr[10] .coord_z = 8;
defparam \macro_inst|ahb2apb_inst|haddr[10] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[10] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[10] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[10] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[10] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[10] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[11] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[11] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [11]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[11]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [11]));
defparam \macro_inst|ahb2apb_inst|haddr[11] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|haddr[11] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|haddr[11] .coord_z = 11;
defparam \macro_inst|ahb2apb_inst|haddr[11] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[11] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[11] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[11] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[11] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[11] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[12] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[12] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [12]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[12]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [12]));
defparam \macro_inst|ahb2apb_inst|haddr[12] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|haddr[12] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[12] .coord_z = 6;
defparam \macro_inst|ahb2apb_inst|haddr[12] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[12] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[12] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[12] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[12] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[12] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[13] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[13] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [13]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[13]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [13]));
defparam \macro_inst|ahb2apb_inst|haddr[13] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|haddr[13] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[13] .coord_z = 3;
defparam \macro_inst|ahb2apb_inst|haddr[13] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[13] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[13] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[13] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[13] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[13] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[14] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[14] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [14]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X58_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[14]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [14]));
defparam \macro_inst|ahb2apb_inst|haddr[14] .coord_x = 16;
defparam \macro_inst|ahb2apb_inst|haddr[14] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[14] .coord_z = 5;
defparam \macro_inst|ahb2apb_inst|haddr[14] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[14] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[14] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[14] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[14] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[14] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[15] (
	.A(\macro_inst|Equal2~1_combout ),
	.B(\macro_inst|u_reg2|pready~q ),
	.C(\rv32.mem_ahb_haddr[15] ),
	.D(\macro_inst|Selector32~2_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [15]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
	.SyncReset(SyncReset_X60_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y2_VCC),
	.LutOut(\macro_inst|Selector32~3_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [15]));
defparam \macro_inst|ahb2apb_inst|haddr[15] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|haddr[15] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[15] .coord_z = 2;
defparam \macro_inst|ahb2apb_inst|haddr[15] .mask = 16'hDD00;
defparam \macro_inst|ahb2apb_inst|haddr[15] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[15] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[15] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[15] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[15] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[16] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_haddr[16] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [16]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
	.SyncReset(SyncReset_X60_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y2_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [16]));
defparam \macro_inst|ahb2apb_inst|haddr[16] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|haddr[16] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[16] .coord_z = 14;
defparam \macro_inst|ahb2apb_inst|haddr[16] .mask = 16'hFFFF;
defparam \macro_inst|ahb2apb_inst|haddr[16] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[16] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[16] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[16] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[16] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[17] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[17] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [17]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[17]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [17]));
defparam \macro_inst|ahb2apb_inst|haddr[17] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|haddr[17] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|haddr[17] .coord_z = 13;
defparam \macro_inst|ahb2apb_inst|haddr[17] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[17] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[17] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[17] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[17] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[17] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[18] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[18] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [18]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[18]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [18]));
defparam \macro_inst|ahb2apb_inst|haddr[18] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|haddr[18] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[18] .coord_z = 8;
defparam \macro_inst|ahb2apb_inst|haddr[18] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[18] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[18] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[18] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[18] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[18] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[19] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[19] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [19]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[19]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [19]));
defparam \macro_inst|ahb2apb_inst|haddr[19] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|haddr[19] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|haddr[19] .coord_z = 0;
defparam \macro_inst|ahb2apb_inst|haddr[19] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[19] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[19] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[19] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[19] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[19] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[20] (
	.A(\rv32.mem_ahb_htrans[1] ),
	.B(\macro_inst|ahb2apb_inst|hreadyout~q ),
	.C(\rv32.mem_ahb_haddr[20] ),
	.D(\macro_inst|ahb2apb_inst|hresp~q ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [20]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
	.SyncReset(SyncReset_X60_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y2_VCC),
	.LutOut(\macro_inst|ahb2apb_inst|always0~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [20]));
defparam \macro_inst|ahb2apb_inst|haddr[20] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|haddr[20] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[20] .coord_z = 7;
defparam \macro_inst|ahb2apb_inst|haddr[20] .mask = 16'h0022;
defparam \macro_inst|ahb2apb_inst|haddr[20] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[20] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[20] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[20] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[20] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[21] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[21] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [21]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[21]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [21]));
defparam \macro_inst|ahb2apb_inst|haddr[21] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|haddr[21] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|haddr[21] .coord_z = 7;
defparam \macro_inst|ahb2apb_inst|haddr[21] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[21] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[21] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[21] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[21] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[21] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[22] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[22] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [22]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[22]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [22]));
defparam \macro_inst|ahb2apb_inst|haddr[22] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|haddr[22] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|haddr[22] .coord_z = 14;
defparam \macro_inst|ahb2apb_inst|haddr[22] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[22] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[22] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[22] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[22] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[22] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[23] (
	.A(\macro_inst|ahb2apb_inst|penable~q ),
	.B(\macro_inst|ahb2apb_inst|psel~q ),
	.C(\rv32.mem_ahb_haddr[23] ),
	.D(\macro_inst|Equal2~1_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [23]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
	.SyncReset(SyncReset_X60_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y2_VCC),
	.LutOut(\macro_inst|u_reg2|pready~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [23]));
defparam \macro_inst|ahb2apb_inst|haddr[23] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|haddr[23] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[23] .coord_z = 5;
defparam \macro_inst|ahb2apb_inst|haddr[23] .mask = 16'hBBFF;
defparam \macro_inst|ahb2apb_inst|haddr[23] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[23] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[23] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[23] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[23] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[2] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[2] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [2]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X58_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[2]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [2]));
defparam \macro_inst|ahb2apb_inst|haddr[2] .coord_x = 16;
defparam \macro_inst|ahb2apb_inst|haddr[2] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[2] .coord_z = 13;
defparam \macro_inst|ahb2apb_inst|haddr[2] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[2] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[2] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[2] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[2] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[2] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[3] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[3] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [3]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X58_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[3]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [3]));
defparam \macro_inst|ahb2apb_inst|haddr[3] .coord_x = 16;
defparam \macro_inst|ahb2apb_inst|haddr[3] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[3] .coord_z = 9;
defparam \macro_inst|ahb2apb_inst|haddr[3] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[3] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[3] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[3] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[3] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[3] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[4] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[4] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [4]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X58_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[4]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [4]));
defparam \macro_inst|ahb2apb_inst|haddr[4] .coord_x = 16;
defparam \macro_inst|ahb2apb_inst|haddr[4] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[4] .coord_z = 15;
defparam \macro_inst|ahb2apb_inst|haddr[4] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[4] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[4] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[4] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[4] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[4] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[5] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[5] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [5]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X58_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[5]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [5]));
defparam \macro_inst|ahb2apb_inst|haddr[5] .coord_x = 16;
defparam \macro_inst|ahb2apb_inst|haddr[5] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[5] .coord_z = 0;
defparam \macro_inst|ahb2apb_inst|haddr[5] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[5] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[5] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[5] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[5] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[5] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[6] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[6] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [6]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X58_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[6]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [6]));
defparam \macro_inst|ahb2apb_inst|haddr[6] .coord_x = 16;
defparam \macro_inst|ahb2apb_inst|haddr[6] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[6] .coord_z = 12;
defparam \macro_inst|ahb2apb_inst|haddr[6] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[6] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[6] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[6] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[6] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[6] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[7] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[7] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [7]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X58_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[7]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [7]));
defparam \macro_inst|ahb2apb_inst|haddr[7] .coord_x = 16;
defparam \macro_inst|ahb2apb_inst|haddr[7] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|haddr[7] .coord_z = 4;
defparam \macro_inst|ahb2apb_inst|haddr[7] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[7] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[7] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[7] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[7] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[7] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[8] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[8] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [8]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[8]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [8]));
defparam \macro_inst|ahb2apb_inst|haddr[8] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|haddr[8] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|haddr[8] .coord_z = 10;
defparam \macro_inst|ahb2apb_inst|haddr[8] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[8] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[8] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[8] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[8] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[8] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|haddr[9] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_haddr[9] ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|haddr [9]),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|haddr[9]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|haddr [9]));
defparam \macro_inst|ahb2apb_inst|haddr[9] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|haddr[9] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|haddr[9] .coord_z = 6;
defparam \macro_inst|ahb2apb_inst|haddr[9] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|haddr[9] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|haddr[9] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[9] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[9] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|haddr[9] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|hdone (
	.A(vcc),
	.B(\macro_inst|ahb2apb_inst|pvalid~q ),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|hreadyout~q ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|hdone~q ),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|hdone~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|hdone~q ));
defparam \macro_inst|ahb2apb_inst|hdone .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|hdone .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|hdone .coord_z = 0;
defparam \macro_inst|ahb2apb_inst|hdone .mask = 16'hFC00;
defparam \macro_inst|ahb2apb_inst|hdone .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|hdone .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|hdone .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|hdone .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|hdone .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|hreadyout (
	.A(\rv32.mem_ahb_htrans[1] ),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|hreadyout~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|hreadyout~q ),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|hreadyout~1_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|hreadyout~q ));
defparam \macro_inst|ahb2apb_inst|hreadyout .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|hreadyout .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|hreadyout .coord_z = 11;
defparam \macro_inst|ahb2apb_inst|hreadyout .mask = 16'h00FA;
defparam \macro_inst|ahb2apb_inst|hreadyout .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|hreadyout .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|hreadyout .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|hreadyout .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|hreadyout .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|hreadyout~0 (
	.A(\macro_inst|ahb2apb_inst|hdone~q ),
	.B(\macro_inst|ahb2apb_inst|hreadyout~q ),
	.C(\macro_inst|ahb2apb_inst|pdone~q ),
	.D(\macro_inst|ahb2apb_inst|hresp~q ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|hreadyout~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|ahb2apb_inst|hreadyout~0 .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|hreadyout~0 .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|hreadyout~0 .coord_z = 1;
defparam \macro_inst|ahb2apb_inst|hreadyout~0 .mask = 16'hFF80;
defparam \macro_inst|ahb2apb_inst|hreadyout~0 .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|hreadyout~0 .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|hreadyout~0 .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|hreadyout~0 .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|hreadyout~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|hresp (
	.A(\rv32.mem_ahb_hready ),
	.B(\macro_inst|WideNor0~1_combout ),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|apb_pdone~combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|hresp~q ),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|hresp~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|hresp~q ));
defparam \macro_inst|ahb2apb_inst|hresp .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|hresp .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|hresp .coord_z = 15;
defparam \macro_inst|ahb2apb_inst|hresp .mask = 16'h5150;
defparam \macro_inst|ahb2apb_inst|hresp .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|hresp .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|hresp .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|hresp .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|hresp .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|hwrite (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwrite ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|hwrite~q ),
	.Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|hwrite__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|hwrite~q ));
defparam \macro_inst|ahb2apb_inst|hwrite .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|hwrite .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|hwrite .coord_z = 10;
defparam \macro_inst|ahb2apb_inst|hwrite .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|hwrite .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|hwrite .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|hwrite .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|hwrite .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|hwrite .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[10] (
	.A(),
	.B(),
	.C(\macro_inst|ahb2apb_inst|haddr [10]),
	.D(),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [10]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(SyncReset_X56_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X56_Y2_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [10]));
defparam \macro_inst|ahb2apb_inst|paddr[10] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[10] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|paddr[10] .coord_z = 9;
defparam \macro_inst|ahb2apb_inst|paddr[10] .mask = 16'hFFFF;
defparam \macro_inst|ahb2apb_inst|paddr[10] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[10] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[10] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[10] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[10] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[11] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|haddr [11]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [11]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|paddr[11]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [11]));
defparam \macro_inst|ahb2apb_inst|paddr[11] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[11] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|paddr[11] .coord_z = 15;
defparam \macro_inst|ahb2apb_inst|paddr[11] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|paddr[11] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[11] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[11] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[11] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[11] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[12] (
	.A(\macro_inst|ahb2apb_inst|paddr [14]),
	.B(\macro_inst|ahb2apb_inst|paddr [13]),
	.C(\macro_inst|ahb2apb_inst|haddr [12]),
	.D(\macro_inst|ahb2apb_inst|paddr [15]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [12]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X57_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
	.SyncReset(SyncReset_X57_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y2_VCC),
	.LutOut(\macro_inst|Equal0~5_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [12]));
defparam \macro_inst|ahb2apb_inst|paddr[12] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[12] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[12] .coord_z = 0;
defparam \macro_inst|ahb2apb_inst|paddr[12] .mask = 16'h0001;
defparam \macro_inst|ahb2apb_inst|paddr[12] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[12] .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[12] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[12] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[12] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[13] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|haddr [13]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [13]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X57_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|paddr[13]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [13]));
defparam \macro_inst|ahb2apb_inst|paddr[13] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[13] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[13] .coord_z = 13;
defparam \macro_inst|ahb2apb_inst|paddr[13] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|paddr[13] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[13] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[13] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[13] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[13] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[14] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|haddr [14]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [14]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X57_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|paddr[14]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [14]));
defparam \macro_inst|ahb2apb_inst|paddr[14] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[14] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[14] .coord_z = 8;
defparam \macro_inst|ahb2apb_inst|paddr[14] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|paddr[14] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[14] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[14] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[14] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[14] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[15] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|haddr [15]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [15]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X57_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|paddr[15]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [15]));
defparam \macro_inst|ahb2apb_inst|paddr[15] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[15] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[15] .coord_z = 9;
defparam \macro_inst|ahb2apb_inst|paddr[15] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|paddr[15] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[15] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[15] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[15] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[15] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[16] (
	.A(\macro_inst|ahb2apb_inst|paddr [18]),
	.B(\macro_inst|ahb2apb_inst|paddr [17]),
	.C(\macro_inst|ahb2apb_inst|haddr [16]),
	.D(\macro_inst|ahb2apb_inst|paddr [19]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [16]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(SyncReset_X56_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X56_Y2_VCC),
	.LutOut(\macro_inst|Equal0~4_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [16]));
defparam \macro_inst|ahb2apb_inst|paddr[16] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[16] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|paddr[16] .coord_z = 3;
defparam \macro_inst|ahb2apb_inst|paddr[16] .mask = 16'h0001;
defparam \macro_inst|ahb2apb_inst|paddr[16] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[16] .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[16] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[16] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[16] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[17] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|haddr [17]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [17]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|paddr[17]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [17]));
defparam \macro_inst|ahb2apb_inst|paddr[17] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[17] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|paddr[17] .coord_z = 2;
defparam \macro_inst|ahb2apb_inst|paddr[17] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|paddr[17] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[17] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[17] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[17] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[17] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[18] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|haddr [18]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [18]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|paddr[18]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [18]));
defparam \macro_inst|ahb2apb_inst|paddr[18] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[18] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|paddr[18] .coord_z = 12;
defparam \macro_inst|ahb2apb_inst|paddr[18] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|paddr[18] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[18] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[18] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[18] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[18] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[19] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|haddr [19]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [19]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|paddr[19]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [19]));
defparam \macro_inst|ahb2apb_inst|paddr[19] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[19] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|paddr[19] .coord_z = 1;
defparam \macro_inst|ahb2apb_inst|paddr[19] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|paddr[19] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[19] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[19] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[19] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[19] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[20] (
	.A(\macro_inst|ahb2apb_inst|paddr [23]),
	.B(\macro_inst|ahb2apb_inst|paddr [22]),
	.C(\macro_inst|ahb2apb_inst|haddr [20]),
	.D(\macro_inst|ahb2apb_inst|paddr [21]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [20]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X57_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
	.SyncReset(SyncReset_X57_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y2_VCC),
	.LutOut(\macro_inst|Equal0~3_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [20]));
defparam \macro_inst|ahb2apb_inst|paddr[20] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[20] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[20] .coord_z = 15;
defparam \macro_inst|ahb2apb_inst|paddr[20] .mask = 16'h0001;
defparam \macro_inst|ahb2apb_inst|paddr[20] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[20] .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[20] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[20] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[20] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[21] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|haddr [21]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [21]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X57_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|paddr[21]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [21]));
defparam \macro_inst|ahb2apb_inst|paddr[21] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[21] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[21] .coord_z = 1;
defparam \macro_inst|ahb2apb_inst|paddr[21] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|paddr[21] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[21] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[21] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[21] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[21] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[22] (
	.A(\macro_inst|ahb2apb_inst|paddr [2]),
	.B(\macro_inst|Equal3~0_combout ),
	.C(\macro_inst|ahb2apb_inst|haddr [22]),
	.D(\macro_inst|ahb2apb_inst|psel~q ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [22]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X57_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
	.SyncReset(SyncReset_X57_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y2_VCC),
	.LutOut(\macro_inst|u_reg_sram_addr|always0~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [22]));
defparam \macro_inst|ahb2apb_inst|paddr[22] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[22] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[22] .coord_z = 3;
defparam \macro_inst|ahb2apb_inst|paddr[22] .mask = 16'h4400;
defparam \macro_inst|ahb2apb_inst|paddr[22] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[22] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[22] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[22] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[22] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[23] (
	.A(\macro_inst|ahb2apb_inst|pwrite~q ),
	.B(\macro_inst|u_sram|prdata[0]~0_combout ),
	.C(\macro_inst|ahb2apb_inst|haddr [23]),
	.D(\macro_inst|u_sram|LessThan0~4_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [23]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X57_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
	.SyncReset(SyncReset_X57_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y2_VCC),
	.LutOut(\macro_inst|u_sram|prdata[0]~1_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [23]));
defparam \macro_inst|ahb2apb_inst|paddr[23] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[23] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[23] .coord_z = 14;
defparam \macro_inst|ahb2apb_inst|paddr[23] .mask = 16'h0044;
defparam \macro_inst|ahb2apb_inst|paddr[23] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[23] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[23] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[23] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[23] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[23]~0 (
	.A(\macro_inst|apb_pready~0_combout ),
	.B(\macro_inst|ahb2apb_inst|pvalid~q ),
	.C(\macro_inst|ahb2apb_inst|apbState.apbAccess~q ),
	.D(\macro_inst|ahb2apb_inst|apbState.apbIdle~q ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|paddr[23]~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|ahb2apb_inst|paddr[23]~0 .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[23]~0 .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|paddr[23]~0 .coord_z = 7;
defparam \macro_inst|ahb2apb_inst|paddr[23]~0 .mask = 16'h80CC;
defparam \macro_inst|ahb2apb_inst|paddr[23]~0 .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[23]~0 .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[23]~0 .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[23]~0 .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[23]~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[2] (
	.A(vcc),
	.B(vcc),
	.C(\macro_inst|ahb2apb_inst|haddr [2]),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [2]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X58_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ),
	.SyncReset(SyncReset_X58_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y2_VCC),
	.LutOut(\macro_inst|Equal4~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [2]));
defparam \macro_inst|ahb2apb_inst|paddr[2] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|paddr[2] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[2] .coord_z = 13;
defparam \macro_inst|ahb2apb_inst|paddr[2] .mask = 16'hF000;
defparam \macro_inst|ahb2apb_inst|paddr[2] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[2] .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[2] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[2] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[2] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[3] (
	.A(\macro_inst|Equal0~9_combout ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|ahb2apb_inst|haddr [3]),
	.D(\macro_inst|ahb2apb_inst|paddr [5]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [3]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X58_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ),
	.SyncReset(SyncReset_X58_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y2_VCC),
	.LutOut(\macro_inst|WideNor0~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [3]));
defparam \macro_inst|ahb2apb_inst|paddr[3] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|paddr[3] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[3] .coord_z = 4;
defparam \macro_inst|ahb2apb_inst|paddr[3] .mask = 16'hFDDF;
defparam \macro_inst|ahb2apb_inst|paddr[3] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[3] .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[3] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[3] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[3] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[4] (
	.A(\macro_inst|ahb2apb_inst|paddr [6]),
	.B(\macro_inst|ahb2apb_inst|paddr [7]),
	.C(\macro_inst|ahb2apb_inst|haddr [4]),
	.D(\macro_inst|Equal0~7_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [4]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X58_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ),
	.SyncReset(SyncReset_X58_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y2_VCC),
	.LutOut(\macro_inst|Equal0~9_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [4]));
defparam \macro_inst|ahb2apb_inst|paddr[4] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|paddr[4] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[4] .coord_z = 1;
defparam \macro_inst|ahb2apb_inst|paddr[4] .mask = 16'h0100;
defparam \macro_inst|ahb2apb_inst|paddr[4] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[4] .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[4] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[4] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[4] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[5] (
	.A(\macro_inst|ahb2apb_inst|paddr [3]),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|ahb2apb_inst|haddr [5]),
	.D(\macro_inst|Equal0~9_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [5]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X58_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ),
	.SyncReset(SyncReset_X58_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y2_VCC),
	.LutOut(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [5]));
defparam \macro_inst|ahb2apb_inst|paddr[5] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|paddr[5] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[5] .coord_z = 15;
defparam \macro_inst|ahb2apb_inst|paddr[5] .mask = 16'h1400;
defparam \macro_inst|ahb2apb_inst|paddr[5] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[5] .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[5] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[5] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[5] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[6] (
	.A(\macro_inst|ahb2apb_inst|paddr [3]),
	.B(vcc),
	.C(\macro_inst|ahb2apb_inst|haddr [6]),
	.D(\macro_inst|ahb2apb_inst|paddr [2]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [6]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X58_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ),
	.SyncReset(SyncReset_X58_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y2_VCC),
	.LutOut(\macro_inst|Equal2~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [6]));
defparam \macro_inst|ahb2apb_inst|paddr[6] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|paddr[6] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[6] .coord_z = 0;
defparam \macro_inst|ahb2apb_inst|paddr[6] .mask = 16'h00AA;
defparam \macro_inst|ahb2apb_inst|paddr[6] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[6] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[6] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[6] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[6] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[7] (
	.A(vcc),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|ahb2apb_inst|haddr [7]),
	.D(\macro_inst|ahb2apb_inst|paddr [5]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [7]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X58_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ),
	.SyncReset(SyncReset_X58_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y2_VCC),
	.LutOut(\macro_inst|Equal1~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [7]));
defparam \macro_inst|ahb2apb_inst|paddr[7] .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|paddr[7] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|paddr[7] .coord_z = 6;
defparam \macro_inst|ahb2apb_inst|paddr[7] .mask = 16'h00CC;
defparam \macro_inst|ahb2apb_inst|paddr[7] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[7] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[7] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[7] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[7] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[8] (
	.A(\macro_inst|ahb2apb_inst|paddr [9]),
	.B(\macro_inst|ahb2apb_inst|paddr [10]),
	.C(\macro_inst|ahb2apb_inst|haddr [8]),
	.D(\macro_inst|ahb2apb_inst|paddr [11]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [8]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(SyncReset_X56_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X56_Y2_VCC),
	.LutOut(\macro_inst|Equal0~6_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [8]));
defparam \macro_inst|ahb2apb_inst|paddr[8] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[8] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|paddr[8] .coord_z = 4;
defparam \macro_inst|ahb2apb_inst|paddr[8] .mask = 16'h0001;
defparam \macro_inst|ahb2apb_inst|paddr[8] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[8] .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[8] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[8] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[8] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|paddr[9] (
	.A(),
	.B(),
	.C(\macro_inst|ahb2apb_inst|haddr [9]),
	.D(),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|paddr [9]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X56_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
	.SyncReset(SyncReset_X56_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X56_Y2_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|paddr [9]));
defparam \macro_inst|ahb2apb_inst|paddr[9] .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|paddr[9] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|paddr[9] .coord_z = 5;
defparam \macro_inst|ahb2apb_inst|paddr[9] .mask = 16'hFFFF;
defparam \macro_inst|ahb2apb_inst|paddr[9] .modeMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[9] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[9] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|paddr[9] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|paddr[9] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|pdone (
	.A(vcc),
	.B(\macro_inst|ahb2apb_inst|pdone~0_combout ),
	.C(\macro_inst|Selector32~3_combout ),
	.D(\macro_inst|Selector32~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|pdone~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|pdone~1_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|pdone~q ));
defparam \macro_inst|ahb2apb_inst|pdone .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|pdone .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|pdone .coord_z = 1;
defparam \macro_inst|ahb2apb_inst|pdone .mask = 16'hC000;
defparam \macro_inst|ahb2apb_inst|pdone .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|pdone .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|pdone .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|pdone .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|pdone .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|pdone~0 (
	.A(\macro_inst|ahb2apb_inst|penable~q ),
	.B(vcc),
	.C(\macro_inst|ahb2apb_inst|psel~q ),
	.D(\macro_inst|ahb2apb_inst|pdone~q ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|pdone~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|ahb2apb_inst|pdone~0 .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|pdone~0 .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|pdone~0 .coord_z = 3;
defparam \macro_inst|ahb2apb_inst|pdone~0 .mask = 16'h00A0;
defparam \macro_inst|ahb2apb_inst|pdone~0 .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|pdone~0 .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|pdone~0 .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|pdone~0 .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|pdone~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|penable (
	.A(\macro_inst|ahb2apb_inst|apbState.apbAccess~q ),
	.B(\macro_inst|ahb2apb_inst|apbState.apbIdle~q ),
	.C(vcc),
	.D(\macro_inst|apb_pready~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|penable~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|Selector41~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|penable~q ));
defparam \macro_inst|ahb2apb_inst|penable .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|penable .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|penable .coord_z = 8;
defparam \macro_inst|ahb2apb_inst|penable .mask = 16'h54F4;
defparam \macro_inst|ahb2apb_inst|penable .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|penable .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|penable .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|penable .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|penable .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[0] (
	.A(vcc),
	.B(\macro_inst|apb_prdata[0]~36_combout ),
	.C(vcc),
	.D(vcc),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [0]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(SyncReset_X56_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|ahb2apb_inst|psel~q__SyncLoad_X56_Y3_INV ),
	.LutOut(\macro_inst|ahb2apb_inst|prdata[0]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [0]));
defparam \macro_inst|ahb2apb_inst|prdata[0] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[0] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[0] .coord_z = 14;
defparam \macro_inst|ahb2apb_inst|prdata[0] .mask = 16'hCCCC;
defparam \macro_inst|ahb2apb_inst|prdata[0] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[0] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[0] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[0] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|prdata[0] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[10] (
	.A(\macro_inst|apb_prdata[10]~64_combout ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [10]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[10]~114_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [10]));
defparam \macro_inst|ahb2apb_inst|prdata[10] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[10] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[10] .coord_z = 2;
defparam \macro_inst|ahb2apb_inst|prdata[10] .mask = 16'h2FAF;
defparam \macro_inst|ahb2apb_inst|prdata[10] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[10] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[10] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[10] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[10] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[11] (
	.A(\macro_inst|apb_prdata[11]~66_combout ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|Equal3~0_combout ),
	.D(\macro_inst|WideNor0~1_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [11]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[11]~115_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [11]));
defparam \macro_inst|ahb2apb_inst|prdata[11] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[11] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|prdata[11] .coord_z = 10;
defparam \macro_inst|ahb2apb_inst|prdata[11] .mask = 16'h2AFF;
defparam \macro_inst|ahb2apb_inst|prdata[11] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[11] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[11] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[11] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[11] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[12] (
	.A(\macro_inst|ahb2apb_inst|paddr [2]),
	.B(\macro_inst|WideNor0~1_combout ),
	.C(\macro_inst|apb_prdata[12]~68_combout ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [12]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[12]~116_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [12]));
defparam \macro_inst|ahb2apb_inst|prdata[12] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[12] .coord_y = 8;
defparam \macro_inst|ahb2apb_inst|prdata[12] .coord_z = 0;
defparam \macro_inst|ahb2apb_inst|prdata[12] .mask = 16'h73F3;
defparam \macro_inst|ahb2apb_inst|prdata[12] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[12] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[12] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[12] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[12] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[13] (
	.A(\macro_inst|WideNor0~1_combout ),
	.B(\macro_inst|apb_prdata[13]~70_combout ),
	.C(\macro_inst|Equal3~0_combout ),
	.D(\macro_inst|ahb2apb_inst|paddr [2]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [13]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[13]~117_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [13]));
defparam \macro_inst|ahb2apb_inst|prdata[13] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[13] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|prdata[13] .coord_z = 2;
defparam \macro_inst|ahb2apb_inst|prdata[13] .mask = 16'h5DDD;
defparam \macro_inst|ahb2apb_inst|prdata[13] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[13] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[13] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[13] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[13] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[14] (
	.A(\macro_inst|ahb2apb_inst|psel~q ),
	.B(\macro_inst|WideNor0~1_combout ),
	.C(\macro_inst|Equal4~0_combout ),
	.D(\macro_inst|apb_prdata[14]~72_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [14]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[14]~73_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [14]));
defparam \macro_inst|ahb2apb_inst|prdata[14] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[14] .coord_y = 8;
defparam \macro_inst|ahb2apb_inst|prdata[14] .coord_z = 14;
defparam \macro_inst|ahb2apb_inst|prdata[14] .mask = 16'h0800;
defparam \macro_inst|ahb2apb_inst|prdata[14] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[14] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[14] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[14] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[14] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[15] (
	.A(\macro_inst|ahb2apb_inst|paddr [2]),
	.B(\macro_inst|Equal3~0_combout ),
	.C(\macro_inst|apb_prdata[15]~75_combout ),
	.D(\macro_inst|WideNor0~1_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [15]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[15]~118_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [15]));
defparam \macro_inst|ahb2apb_inst|prdata[15] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[15] .coord_y = 8;
defparam \macro_inst|ahb2apb_inst|prdata[15] .coord_z = 15;
defparam \macro_inst|ahb2apb_inst|prdata[15] .mask = 16'h70FF;
defparam \macro_inst|ahb2apb_inst|prdata[15] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[15] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[15] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[15] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[15] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[16] (
	.A(\macro_inst|ahb2apb_inst|paddr [2]),
	.B(\macro_inst|WideNor0~1_combout ),
	.C(\macro_inst|Equal3~0_combout ),
	.D(\macro_inst|apb_prdata[16]~77_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [16]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[16]~119_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [16]));
defparam \macro_inst|ahb2apb_inst|prdata[16] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[16] .coord_y = 8;
defparam \macro_inst|ahb2apb_inst|prdata[16] .coord_z = 10;
defparam \macro_inst|ahb2apb_inst|prdata[16] .mask = 16'h7F33;
defparam \macro_inst|ahb2apb_inst|prdata[16] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[16] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[16] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[16] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[16] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[17] (
	.A(\macro_inst|ahb2apb_inst|psel~q ),
	.B(\macro_inst|apb_prdata[17]~79_combout ),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|Equal4~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [17]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[17]~80_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [17]));
defparam \macro_inst|ahb2apb_inst|prdata[17] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[17] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[17] .coord_z = 10;
defparam \macro_inst|ahb2apb_inst|prdata[17] .mask = 16'h0080;
defparam \macro_inst|ahb2apb_inst|prdata[17] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[17] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[17] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[17] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[17] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[18] (
	.A(\macro_inst|Equal3~0_combout ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|apb_prdata[18]~82_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [18]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[18]~120_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [18]));
defparam \macro_inst|ahb2apb_inst|prdata[18] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[18] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|prdata[18] .coord_z = 5;
defparam \macro_inst|ahb2apb_inst|prdata[18] .mask = 16'h7F0F;
defparam \macro_inst|ahb2apb_inst|prdata[18] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[18] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[18] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[18] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[18] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[19] (
	.A(\macro_inst|Equal3~0_combout ),
	.B(\macro_inst|apb_prdata[19]~84_combout ),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|ahb2apb_inst|paddr [2]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [19]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[19]~121_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [19]));
defparam \macro_inst|ahb2apb_inst|prdata[19] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[19] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|prdata[19] .coord_z = 4;
defparam \macro_inst|ahb2apb_inst|prdata[19] .mask = 16'h4FCF;
defparam \macro_inst|ahb2apb_inst|prdata[19] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[19] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[19] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[19] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[19] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[1] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|apb_prdata[1]~39_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [1]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(SyncReset_X56_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|ahb2apb_inst|psel~q__SyncLoad_X56_Y3_INV ),
	.LutOut(\macro_inst|ahb2apb_inst|prdata[1]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [1]));
defparam \macro_inst|ahb2apb_inst|prdata[1] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[1] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[1] .coord_z = 12;
defparam \macro_inst|ahb2apb_inst|prdata[1] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|prdata[1] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[1] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[1] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[1] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|prdata[1] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[20] (
	.A(\macro_inst|apb_prdata[20]~86_combout ),
	.B(\macro_inst|WideNor0~1_combout ),
	.C(\macro_inst|Equal4~0_combout ),
	.D(\macro_inst|ahb2apb_inst|psel~q ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [20]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[20]~87_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [20]));
defparam \macro_inst|ahb2apb_inst|prdata[20] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[20] .coord_y = 8;
defparam \macro_inst|ahb2apb_inst|prdata[20] .coord_z = 12;
defparam \macro_inst|ahb2apb_inst|prdata[20] .mask = 16'h0800;
defparam \macro_inst|ahb2apb_inst|prdata[20] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[20] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[20] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[20] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[20] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[21] (
	.A(\macro_inst|WideNor0~1_combout ),
	.B(\macro_inst|apb_prdata[21]~89_combout ),
	.C(\macro_inst|Equal3~0_combout ),
	.D(\macro_inst|ahb2apb_inst|paddr [2]),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [21]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[21]~122_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [21]));
defparam \macro_inst|ahb2apb_inst|prdata[21] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[21] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|prdata[21] .coord_z = 12;
defparam \macro_inst|ahb2apb_inst|prdata[21] .mask = 16'h5DDD;
defparam \macro_inst|ahb2apb_inst|prdata[21] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[21] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[21] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[21] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[21] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[22] (
	.A(\macro_inst|ahb2apb_inst|psel~q ),
	.B(\macro_inst|apb_prdata[22]~91_combout ),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|Equal4~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [22]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[22]~92_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [22]));
defparam \macro_inst|ahb2apb_inst|prdata[22] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[22] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[22] .coord_z = 15;
defparam \macro_inst|ahb2apb_inst|prdata[22] .mask = 16'h0080;
defparam \macro_inst|ahb2apb_inst|prdata[22] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[22] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[22] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[22] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[22] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[23] (
	.A(\macro_inst|Equal3~0_combout ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|apb_prdata[23]~94_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [23]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[23]~123_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [23]));
defparam \macro_inst|ahb2apb_inst|prdata[23] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[23] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|prdata[23] .coord_z = 15;
defparam \macro_inst|ahb2apb_inst|prdata[23] .mask = 16'h7F0F;
defparam \macro_inst|ahb2apb_inst|prdata[23] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[23] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[23] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[23] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[23] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[24] (
	.A(\macro_inst|ahb2apb_inst|psel~q ),
	.B(\macro_inst|apb_prdata[24]~96_combout ),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|Equal4~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [24]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[24]~97_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [24]));
defparam \macro_inst|ahb2apb_inst|prdata[24] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[24] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[24] .coord_z = 9;
defparam \macro_inst|ahb2apb_inst|prdata[24] .mask = 16'h0080;
defparam \macro_inst|ahb2apb_inst|prdata[24] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[24] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[24] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[24] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[24] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[25] (
	.A(\macro_inst|apb_prdata[25]~99_combout ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [25]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[25]~124_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [25]));
defparam \macro_inst|ahb2apb_inst|prdata[25] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[25] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[25] .coord_z = 8;
defparam \macro_inst|ahb2apb_inst|prdata[25] .mask = 16'h2FAF;
defparam \macro_inst|ahb2apb_inst|prdata[25] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[25] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[25] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[25] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[25] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[26] (
	.A(\macro_inst|apb_prdata[26]~101_combout ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [26]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[26]~125_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [26]));
defparam \macro_inst|ahb2apb_inst|prdata[26] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[26] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[26] .coord_z = 1;
defparam \macro_inst|ahb2apb_inst|prdata[26] .mask = 16'h2FAF;
defparam \macro_inst|ahb2apb_inst|prdata[26] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[26] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[26] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[26] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[26] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[27] (
	.A(\macro_inst|apb_prdata[27]~103_combout ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [27]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[27]~126_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [27]));
defparam \macro_inst|ahb2apb_inst|prdata[27] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[27] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[27] .coord_z = 11;
defparam \macro_inst|ahb2apb_inst|prdata[27] .mask = 16'h2FAF;
defparam \macro_inst|ahb2apb_inst|prdata[27] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[27] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[27] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[27] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[27] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[28] (
	.A(\macro_inst|apb_prdata[28]~105_combout ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [28]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[28]~127_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [28]));
defparam \macro_inst|ahb2apb_inst|prdata[28] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[28] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[28] .coord_z = 0;
defparam \macro_inst|ahb2apb_inst|prdata[28] .mask = 16'h2FAF;
defparam \macro_inst|ahb2apb_inst|prdata[28] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[28] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[28] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[28] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[28] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[29] (
	.A(\macro_inst|WideNor0~1_combout ),
	.B(\macro_inst|apb_prdata[29]~107_combout ),
	.C(\macro_inst|ahb2apb_inst|psel~q ),
	.D(\macro_inst|Equal4~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [29]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[29]~108_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [29]));
defparam \macro_inst|ahb2apb_inst|prdata[29] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[29] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[29] .coord_z = 5;
defparam \macro_inst|ahb2apb_inst|prdata[29] .mask = 16'h0080;
defparam \macro_inst|ahb2apb_inst|prdata[29] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[29] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[29] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[29] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[29] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[2] (
	.A(vcc),
	.B(\macro_inst|apb_prdata[2]~42_combout ),
	.C(vcc),
	.D(vcc),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [2]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
	.SyncReset(SyncReset_X60_Y1_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|ahb2apb_inst|psel~q__SyncLoad_X60_Y1_INV ),
	.LutOut(\macro_inst|ahb2apb_inst|prdata[2]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [2]));
defparam \macro_inst|ahb2apb_inst|prdata[2] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[2] .coord_y = 8;
defparam \macro_inst|ahb2apb_inst|prdata[2] .coord_z = 6;
defparam \macro_inst|ahb2apb_inst|prdata[2] .mask = 16'hCCCC;
defparam \macro_inst|ahb2apb_inst|prdata[2] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[2] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[2] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[2] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|prdata[2] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[30] (
	.A(\macro_inst|WideNor0~1_combout ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|apb_prdata[30]~110_combout ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [30]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[30]~128_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [30]));
defparam \macro_inst|ahb2apb_inst|prdata[30] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[30] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[30] .coord_z = 3;
defparam \macro_inst|ahb2apb_inst|prdata[30] .mask = 16'h75F5;
defparam \macro_inst|ahb2apb_inst|prdata[30] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[30] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[30] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[30] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[30] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[31] (
	.A(\macro_inst|apb_prdata[31]~112_combout ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [31]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[31]~129_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [31]));
defparam \macro_inst|ahb2apb_inst|prdata[31] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[31] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[31] .coord_z = 4;
defparam \macro_inst|ahb2apb_inst|prdata[31] .mask = 16'h2FAF;
defparam \macro_inst|ahb2apb_inst|prdata[31] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[31] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[31] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[31] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[31] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[3] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|apb_prdata[3]~45_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [3]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
	.SyncReset(SyncReset_X60_Y1_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|ahb2apb_inst|psel~q__SyncLoad_X60_Y1_INV ),
	.LutOut(\macro_inst|ahb2apb_inst|prdata[3]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [3]));
defparam \macro_inst|ahb2apb_inst|prdata[3] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[3] .coord_y = 8;
defparam \macro_inst|ahb2apb_inst|prdata[3] .coord_z = 11;
defparam \macro_inst|ahb2apb_inst|prdata[3] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|prdata[3] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[3] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[3] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[3] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|prdata[3] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[4] (
	.A(\macro_inst|u_reg2|reg_out [4]),
	.B(\macro_inst|apb_prdata[4]~46_combout ),
	.C(\macro_inst|apb_prdata[4]~47_combout ),
	.D(\macro_inst|Equal2~1_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [4]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X57_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
	.SyncReset(\macro_inst|ahb2apb_inst|psel~q__SyncReset_X57_Y1_INV ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y1_GND),
	.LutOut(\macro_inst|apb_prdata[4]~48_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [4]));
defparam \macro_inst|ahb2apb_inst|prdata[4] .coord_x = 20;
defparam \macro_inst|ahb2apb_inst|prdata[4] .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|prdata[4] .coord_z = 7;
defparam \macro_inst|ahb2apb_inst|prdata[4] .mask = 16'hFEFC;
defparam \macro_inst|ahb2apb_inst|prdata[4] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[4] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[4] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[4] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|prdata[4] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[5] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|apb_prdata[5]~51_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [5]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
	.SyncReset(SyncReset_X60_Y1_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|ahb2apb_inst|psel~q__SyncLoad_X60_Y1_INV ),
	.LutOut(\macro_inst|ahb2apb_inst|prdata[5]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [5]));
defparam \macro_inst|ahb2apb_inst|prdata[5] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[5] .coord_y = 8;
defparam \macro_inst|ahb2apb_inst|prdata[5] .coord_z = 13;
defparam \macro_inst|ahb2apb_inst|prdata[5] .mask = 16'hFF00;
defparam \macro_inst|ahb2apb_inst|prdata[5] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[5] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[5] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[5] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|prdata[5] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[6] (
	.A(vcc),
	.B(\macro_inst|apb_prdata[6]~54_combout ),
	.C(vcc),
	.D(vcc),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [6]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
	.SyncReset(SyncReset_X60_Y1_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|ahb2apb_inst|psel~q__SyncLoad_X60_Y1_INV ),
	.LutOut(\macro_inst|ahb2apb_inst|prdata[6]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [6]));
defparam \macro_inst|ahb2apb_inst|prdata[6] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[6] .coord_y = 8;
defparam \macro_inst|ahb2apb_inst|prdata[6] .coord_z = 7;
defparam \macro_inst|ahb2apb_inst|prdata[6] .mask = 16'hCCCC;
defparam \macro_inst|ahb2apb_inst|prdata[6] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[6] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[6] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[6] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|prdata[6] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[7] (
	.A(\macro_inst|apb_prdata[7]~57_combout ),
	.B(vcc),
	.C(vcc),
	.D(vcc),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [7]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(SyncReset_X56_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|ahb2apb_inst|psel~q__SyncLoad_X56_Y3_INV ),
	.LutOut(\macro_inst|ahb2apb_inst|prdata[7]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [7]));
defparam \macro_inst|ahb2apb_inst|prdata[7] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[7] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[7] .coord_z = 13;
defparam \macro_inst|ahb2apb_inst|prdata[7] .mask = 16'hAAAA;
defparam \macro_inst|ahb2apb_inst|prdata[7] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[7] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[7] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[7] .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|prdata[7] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[8] (
	.A(\macro_inst|WideNor0~1_combout ),
	.B(\macro_inst|Equal4~0_combout ),
	.C(\macro_inst|ahb2apb_inst|psel~q ),
	.D(\macro_inst|apb_prdata[8]~59_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [8]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X56_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[8]~60_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [8]));
defparam \macro_inst|ahb2apb_inst|prdata[8] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[8] .coord_y = 11;
defparam \macro_inst|ahb2apb_inst|prdata[8] .coord_z = 7;
defparam \macro_inst|ahb2apb_inst|prdata[8] .mask = 16'h2000;
defparam \macro_inst|ahb2apb_inst|prdata[8] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[8] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[8] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[8] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[8] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|prdata[9] (
	.A(\macro_inst|Equal3~0_combout ),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\macro_inst|WideNor0~1_combout ),
	.D(\macro_inst|apb_prdata[9]~62_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|prdata [9]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|apb_pdone~combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_prdata[9]~113_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|prdata [9]));
defparam \macro_inst|ahb2apb_inst|prdata[9] .coord_x = 14;
defparam \macro_inst|ahb2apb_inst|prdata[9] .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|prdata[9] .coord_z = 7;
defparam \macro_inst|ahb2apb_inst|prdata[9] .mask = 16'h7F0F;
defparam \macro_inst|ahb2apb_inst|prdata[9] .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[9] .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[9] .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[9] .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|prdata[9] .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|psel (
	.A(\macro_inst|ahb2apb_inst|psel~0_combout ),
	.B(\macro_inst|ahb2apb_inst|pvalid~q ),
	.C(vcc),
	.D(\macro_inst|apb_pready~0_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|psel~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|psel~1_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|psel~q ));
defparam \macro_inst|ahb2apb_inst|psel .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|psel .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|psel .coord_z = 4;
defparam \macro_inst|ahb2apb_inst|psel .mask = 16'hD4F6;
defparam \macro_inst|ahb2apb_inst|psel .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|psel .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|psel .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|psel .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|psel .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|psel~0 (
	.A(vcc),
	.B(\macro_inst|ahb2apb_inst|apbState.apbIdle~q ),
	.C(\macro_inst|ahb2apb_inst|apbState.apbAccess~q ),
	.D(\macro_inst|ahb2apb_inst|pvalid~q ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|psel~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|ahb2apb_inst|psel~0 .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|psel~0 .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|psel~0 .coord_z = 2;
defparam \macro_inst|ahb2apb_inst|psel~0 .mask = 16'h0CC0;
defparam \macro_inst|ahb2apb_inst|psel~0 .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|psel~0 .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|psel~0 .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|psel~0 .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|psel~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|pvalid (
	.A(vcc),
	.B(\macro_inst|ahb2apb_inst|pdone~q ),
	.C(\macro_inst|ahb2apb_inst|psel~q ),
	.D(\macro_inst|ahb2apb_inst|hreadyout~q ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|pvalid~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|ahb2apb_inst|always2~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|pvalid~q ));
defparam \macro_inst|ahb2apb_inst|pvalid .coord_x = 18;
defparam \macro_inst|ahb2apb_inst|pvalid .coord_y = 12;
defparam \macro_inst|ahb2apb_inst|pvalid .coord_z = 9;
defparam \macro_inst|ahb2apb_inst|pvalid .mask = 16'h0300;
defparam \macro_inst|ahb2apb_inst|pvalid .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|pvalid .FeedbackMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|pvalid .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|pvalid .BypassEn = 1'b0;
defparam \macro_inst|ahb2apb_inst|pvalid .CarryEnb = 1'b1;

alta_slice \macro_inst|ahb2apb_inst|pwrite (
	.A(\macro_inst|ahb2apb_inst|penable~q ),
	.B(\macro_inst|ahb2apb_inst|psel~q ),
	.C(\macro_inst|ahb2apb_inst|hwrite~q ),
	.D(\macro_inst|Equal0~8_combout ),
	.Cin(),
	.Qin(\macro_inst|ahb2apb_inst|pwrite~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|ahb2apb_inst|paddr[23]~0_combout_X58_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ),
	.SyncReset(SyncReset_X58_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y2_VCC),
	.LutOut(\macro_inst|u_reg0|reg_out[0]~0_combout ),
	.Cout(),
	.Q(\macro_inst|ahb2apb_inst|pwrite~q ));
defparam \macro_inst|ahb2apb_inst|pwrite .coord_x = 17;
defparam \macro_inst|ahb2apb_inst|pwrite .coord_y = 10;
defparam \macro_inst|ahb2apb_inst|pwrite .coord_z = 7;
defparam \macro_inst|ahb2apb_inst|pwrite .mask = 16'h8000;
defparam \macro_inst|ahb2apb_inst|pwrite .modeMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|pwrite .FeedbackMux = 1'b1;
defparam \macro_inst|ahb2apb_inst|pwrite .ShiftMux = 1'b0;
defparam \macro_inst|ahb2apb_inst|pwrite .BypassEn = 1'b1;
defparam \macro_inst|ahb2apb_inst|pwrite .CarryEnb = 1'b1;

alta_slice \macro_inst|apb_pready~0 (
	.A(\macro_inst|ahb2apb_inst|psel~q ),
	.B(vcc),
	.C(\macro_inst|Selector32~3_combout ),
	.D(\macro_inst|Selector32~0_combout ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|apb_pready~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|apb_pready~0 .coord_x = 18;
defparam \macro_inst|apb_pready~0 .coord_y = 12;
defparam \macro_inst|apb_pready~0 .coord_z = 11;
defparam \macro_inst|apb_pready~0 .mask = 16'hF555;
defparam \macro_inst|apb_pready~0 .modeMux = 1'b0;
defparam \macro_inst|apb_pready~0 .FeedbackMux = 1'b0;
defparam \macro_inst|apb_pready~0 .ShiftMux = 1'b0;
defparam \macro_inst|apb_pready~0 .BypassEn = 1'b0;
defparam \macro_inst|apb_pready~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|pready (
	.A(vcc),
	.B(\macro_inst|ahb2apb_inst|psel~q ),
	.C(\macro_inst|ahb2apb_inst|penable~q ),
	.D(\macro_inst|Equal0~8_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|pready~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__sys_resetn~clkctrl_outclk_X58_Y2_SIG_INV ),
	.AsyncReset(AsyncReset_X58_Y2_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg0|pready~0_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|pready~q ));
defparam \macro_inst|u_reg0|pready .coord_x = 17;
defparam \macro_inst|u_reg0|pready .coord_y = 10;
defparam \macro_inst|u_reg0|pready .coord_z = 9;
defparam \macro_inst|u_reg0|pready .mask = 16'hF3FF;
defparam \macro_inst|u_reg0|pready .modeMux = 1'b0;
defparam \macro_inst|u_reg0|pready .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg0|pready .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|pready .BypassEn = 1'b0;
defparam \macro_inst|u_reg0|pready .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[0] (
	.A(\macro_inst|u_reg1|reg_out [0]),
	.B(\macro_inst|Equal1~1_combout ),
	.C(\rv32.mem_ahb_hwdata[0] ),
	.D(\macro_inst|Equal0~8_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [0]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(SyncReset_X59_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y2_VCC),
	.LutOut(\macro_inst|apb_prdata[0]~34_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [0]));
defparam \macro_inst|u_reg0|reg_out[0] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[0] .coord_y = 10;
defparam \macro_inst|u_reg0|reg_out[0] .coord_z = 2;
defparam \macro_inst|u_reg0|reg_out[0] .mask = 16'hB0BB;
defparam \macro_inst|u_reg0|reg_out[0] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[0] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[0] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[0] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[0] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[10] (
	.A(\macro_inst|u_reg1|reg_out [10]),
	.B(\macro_inst|WideNor0~0_combout ),
	.C(\rv32.mem_ahb_hwdata[10] ),
	.D(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [10]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(SyncReset_X59_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y2_VCC),
	.LutOut(\macro_inst|apb_prdata[10]~63_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [10]));
defparam \macro_inst|u_reg0|reg_out[10] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[10] .coord_y = 10;
defparam \macro_inst|u_reg0|reg_out[10] .coord_z = 6;
defparam \macro_inst|u_reg0|reg_out[10] .mask = 16'hBBC0;
defparam \macro_inst|u_reg0|reg_out[10] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[10] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[10] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[10] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[10] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[11] (
	.A(\macro_inst|u_reg2|reg_out [11]),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[11] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [11]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[11]~65_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [11]));
defparam \macro_inst|u_reg0|reg_out[11] .coord_x = 15;
defparam \macro_inst|u_reg0|reg_out[11] .coord_y = 12;
defparam \macro_inst|u_reg0|reg_out[11] .coord_z = 4;
defparam \macro_inst|u_reg0|reg_out[11] .mask = 16'h30EE;
defparam \macro_inst|u_reg0|reg_out[11] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[11] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[11] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[11] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[11] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[12] (
	.A(\macro_inst|u_reg1|reg_out [12]),
	.B(\macro_inst|WideNor0~0_combout ),
	.C(\rv32.mem_ahb_hwdata[12] ),
	.D(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [12]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
	.SyncReset(SyncReset_X61_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[12]~67_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [12]));
defparam \macro_inst|u_reg0|reg_out[12] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[12] .coord_y = 8;
defparam \macro_inst|u_reg0|reg_out[12] .coord_z = 5;
defparam \macro_inst|u_reg0|reg_out[12] .mask = 16'hBBC0;
defparam \macro_inst|u_reg0|reg_out[12] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[12] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[12] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[12] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[12] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[13] (
	.A(\macro_inst|u_reg2|reg_out [13]),
	.B(\macro_inst|WideNor0~0_combout ),
	.C(\rv32.mem_ahb_hwdata[13] ),
	.D(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [13]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[13]~69_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [13]));
defparam \macro_inst|u_reg0|reg_out[13] .coord_x = 15;
defparam \macro_inst|u_reg0|reg_out[13] .coord_y = 12;
defparam \macro_inst|u_reg0|reg_out[13] .coord_z = 1;
defparam \macro_inst|u_reg0|reg_out[13] .mask = 16'h33E2;
defparam \macro_inst|u_reg0|reg_out[13] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[13] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[13] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[13] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[13] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[14] (
	.A(\macro_inst|WideNor0~0_combout ),
	.B(\macro_inst|u_reg1|reg_out [14]),
	.C(\rv32.mem_ahb_hwdata[14] ),
	.D(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [14]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
	.SyncReset(SyncReset_X58_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[14]~71_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [14]));
defparam \macro_inst|u_reg0|reg_out[14] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[14] .coord_y = 12;
defparam \macro_inst|u_reg0|reg_out[14] .coord_z = 8;
defparam \macro_inst|u_reg0|reg_out[14] .mask = 16'hDDA0;
defparam \macro_inst|u_reg0|reg_out[14] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[14] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[14] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[14] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[14] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[15] (
	.A(\macro_inst|u_reg2|reg_out [15]),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[15] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [15]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
	.SyncReset(SyncReset_X61_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[15]~74_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [15]));
defparam \macro_inst|u_reg0|reg_out[15] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[15] .coord_y = 8;
defparam \macro_inst|u_reg0|reg_out[15] .coord_z = 8;
defparam \macro_inst|u_reg0|reg_out[15] .mask = 16'h30EE;
defparam \macro_inst|u_reg0|reg_out[15] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[15] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[15] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[15] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[15] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[16] (
	.A(\macro_inst|u_reg1|reg_out [16]),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[16] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [16]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(SyncReset_X59_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y2_VCC),
	.LutOut(\macro_inst|apb_prdata[16]~76_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [16]));
defparam \macro_inst|u_reg0|reg_out[16] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[16] .coord_y = 10;
defparam \macro_inst|u_reg0|reg_out[16] .coord_z = 9;
defparam \macro_inst|u_reg0|reg_out[16] .mask = 16'hB8CC;
defparam \macro_inst|u_reg0|reg_out[16] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[16] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[16] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[16] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[16] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[17] (
	.A(\macro_inst|u_reg2|reg_out [17]),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[17] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [17]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[17]~78_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [17]));
defparam \macro_inst|u_reg0|reg_out[17] .coord_x = 15;
defparam \macro_inst|u_reg0|reg_out[17] .coord_y = 12;
defparam \macro_inst|u_reg0|reg_out[17] .coord_z = 13;
defparam \macro_inst|u_reg0|reg_out[17] .mask = 16'h30EE;
defparam \macro_inst|u_reg0|reg_out[17] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[17] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[17] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[17] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[17] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[18] (
	.A(\macro_inst|u_reg1|reg_out [18]),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[18] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [18]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[18]~81_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [18]));
defparam \macro_inst|u_reg0|reg_out[18] .coord_x = 15;
defparam \macro_inst|u_reg0|reg_out[18] .coord_y = 12;
defparam \macro_inst|u_reg0|reg_out[18] .coord_z = 11;
defparam \macro_inst|u_reg0|reg_out[18] .mask = 16'hB8CC;
defparam \macro_inst|u_reg0|reg_out[18] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[18] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[18] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[18] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[18] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[19] (
	.A(\macro_inst|WideNor0~0_combout ),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[19] ),
	.D(\macro_inst|u_reg2|reg_out [19]),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [19]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[19]~83_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [19]));
defparam \macro_inst|u_reg0|reg_out[19] .coord_x = 15;
defparam \macro_inst|u_reg0|reg_out[19] .coord_y = 12;
defparam \macro_inst|u_reg0|reg_out[19] .coord_z = 10;
defparam \macro_inst|u_reg0|reg_out[19] .mask = 16'h7564;
defparam \macro_inst|u_reg0|reg_out[19] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[19] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[19] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[19] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[19] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[1] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[1] ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [1]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg0|reg_out[1]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [1]));
defparam \macro_inst|u_reg0|reg_out[1] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[1] .coord_y = 10;
defparam \macro_inst|u_reg0|reg_out[1] .coord_z = 1;
defparam \macro_inst|u_reg0|reg_out[1] .mask = 16'hFF00;
defparam \macro_inst|u_reg0|reg_out[1] .modeMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[1] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[1] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[1] .BypassEn = 1'b0;
defparam \macro_inst|u_reg0|reg_out[1] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[20] (
	.A(\macro_inst|u_reg1|reg_out [20]),
	.B(\macro_inst|WideNor0~0_combout ),
	.C(\rv32.mem_ahb_hwdata[20] ),
	.D(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [20]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
	.SyncReset(SyncReset_X61_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[20]~85_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [20]));
defparam \macro_inst|u_reg0|reg_out[20] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[20] .coord_y = 8;
defparam \macro_inst|u_reg0|reg_out[20] .coord_z = 3;
defparam \macro_inst|u_reg0|reg_out[20] .mask = 16'hBBC0;
defparam \macro_inst|u_reg0|reg_out[20] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[20] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[20] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[20] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[20] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[21] (
	.A(\macro_inst|u_reg2|reg_out [21]),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[21] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [21]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(SyncReset_X59_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y2_VCC),
	.LutOut(\macro_inst|apb_prdata[21]~88_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [21]));
defparam \macro_inst|u_reg0|reg_out[21] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[21] .coord_y = 10;
defparam \macro_inst|u_reg0|reg_out[21] .coord_z = 5;
defparam \macro_inst|u_reg0|reg_out[21] .mask = 16'h30EE;
defparam \macro_inst|u_reg0|reg_out[21] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[21] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[21] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[21] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[21] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[22] (
	.A(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.B(\macro_inst|WideNor0~0_combout ),
	.C(\rv32.mem_ahb_hwdata[22] ),
	.D(\macro_inst|u_reg1|reg_out [22]),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [22]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[22]~90_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [22]));
defparam \macro_inst|u_reg0|reg_out[22] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[22] .coord_y = 9;
defparam \macro_inst|u_reg0|reg_out[22] .coord_z = 14;
defparam \macro_inst|u_reg0|reg_out[22] .mask = 16'hEA62;
defparam \macro_inst|u_reg0|reg_out[22] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[22] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[22] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[22] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[22] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[23] (
	.A(\macro_inst|u_reg2|reg_out [23]),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[23] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [23]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[23]~93_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [23]));
defparam \macro_inst|u_reg0|reg_out[23] .coord_x = 15;
defparam \macro_inst|u_reg0|reg_out[23] .coord_y = 12;
defparam \macro_inst|u_reg0|reg_out[23] .coord_z = 7;
defparam \macro_inst|u_reg0|reg_out[23] .mask = 16'h30EE;
defparam \macro_inst|u_reg0|reg_out[23] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[23] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[23] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[23] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[23] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[24] (
	.A(\macro_inst|WideNor0~0_combout ),
	.B(\macro_inst|u_reg1|reg_out [24]),
	.C(\rv32.mem_ahb_hwdata[24] ),
	.D(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [24]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[24]~95_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [24]));
defparam \macro_inst|u_reg0|reg_out[24] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[24] .coord_y = 9;
defparam \macro_inst|u_reg0|reg_out[24] .coord_z = 7;
defparam \macro_inst|u_reg0|reg_out[24] .mask = 16'hDDA0;
defparam \macro_inst|u_reg0|reg_out[24] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[24] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[24] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[24] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[24] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[25] (
	.A(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.B(\macro_inst|WideNor0~0_combout ),
	.C(\rv32.mem_ahb_hwdata[25] ),
	.D(\macro_inst|u_reg2|reg_out [25]),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [25]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[25]~98_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [25]));
defparam \macro_inst|u_reg0|reg_out[25] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[25] .coord_y = 9;
defparam \macro_inst|u_reg0|reg_out[25] .coord_z = 2;
defparam \macro_inst|u_reg0|reg_out[25] .mask = 16'h7362;
defparam \macro_inst|u_reg0|reg_out[25] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[25] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[25] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[25] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[25] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[26] (
	.A(\macro_inst|WideNor0~0_combout ),
	.B(\macro_inst|u_reg1|reg_out [26]),
	.C(\rv32.mem_ahb_hwdata[26] ),
	.D(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [26]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[26]~100_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [26]));
defparam \macro_inst|u_reg0|reg_out[26] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[26] .coord_y = 9;
defparam \macro_inst|u_reg0|reg_out[26] .coord_z = 11;
defparam \macro_inst|u_reg0|reg_out[26] .mask = 16'hDDA0;
defparam \macro_inst|u_reg0|reg_out[26] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[26] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[26] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[26] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[26] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[27] (
	.A(\macro_inst|WideNor0~0_combout ),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[27] ),
	.D(\macro_inst|u_reg2|reg_out [27]),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [27]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[27]~102_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [27]));
defparam \macro_inst|u_reg0|reg_out[27] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[27] .coord_y = 9;
defparam \macro_inst|u_reg0|reg_out[27] .coord_z = 12;
defparam \macro_inst|u_reg0|reg_out[27] .mask = 16'h7564;
defparam \macro_inst|u_reg0|reg_out[27] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[27] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[27] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[27] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[27] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[28] (
	.A(\macro_inst|WideNor0~0_combout ),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[28] ),
	.D(\macro_inst|u_reg1|reg_out [28]),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [28]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[28]~104_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [28]));
defparam \macro_inst|u_reg0|reg_out[28] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[28] .coord_y = 9;
defparam \macro_inst|u_reg0|reg_out[28] .coord_z = 0;
defparam \macro_inst|u_reg0|reg_out[28] .mask = 16'hEC64;
defparam \macro_inst|u_reg0|reg_out[28] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[28] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[28] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[28] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[28] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[29] (
	.A(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.B(\macro_inst|WideNor0~0_combout ),
	.C(\rv32.mem_ahb_hwdata[29] ),
	.D(\macro_inst|u_reg2|reg_out [29]),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [29]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[29]~106_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [29]));
defparam \macro_inst|u_reg0|reg_out[29] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[29] .coord_y = 9;
defparam \macro_inst|u_reg0|reg_out[29] .coord_z = 10;
defparam \macro_inst|u_reg0|reg_out[29] .mask = 16'h7362;
defparam \macro_inst|u_reg0|reg_out[29] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[29] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[29] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[29] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[29] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[2] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[2] ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [2]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg0|reg_out[2]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [2]));
defparam \macro_inst|u_reg0|reg_out[2] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[2] .coord_y = 12;
defparam \macro_inst|u_reg0|reg_out[2] .coord_z = 7;
defparam \macro_inst|u_reg0|reg_out[2] .mask = 16'hFF00;
defparam \macro_inst|u_reg0|reg_out[2] .modeMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[2] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[2] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[2] .BypassEn = 1'b0;
defparam \macro_inst|u_reg0|reg_out[2] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[30] (
	.A(\macro_inst|WideNor0~0_combout ),
	.B(\macro_inst|u_reg1|reg_out [30]),
	.C(\rv32.mem_ahb_hwdata[30] ),
	.D(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [30]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[30]~109_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [30]));
defparam \macro_inst|u_reg0|reg_out[30] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[30] .coord_y = 9;
defparam \macro_inst|u_reg0|reg_out[30] .coord_z = 1;
defparam \macro_inst|u_reg0|reg_out[30] .mask = 16'hDDA0;
defparam \macro_inst|u_reg0|reg_out[30] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[30] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[30] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[30] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[30] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[31] (
	.A(\macro_inst|WideNor0~0_combout ),
	.B(\macro_inst|u_reg2|reg_out [31]),
	.C(\rv32.mem_ahb_hwdata[31] ),
	.D(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [31]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[31]~111_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [31]));
defparam \macro_inst|u_reg0|reg_out[31] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[31] .coord_y = 9;
defparam \macro_inst|u_reg0|reg_out[31] .coord_z = 13;
defparam \macro_inst|u_reg0|reg_out[31] .mask = 16'h55E4;
defparam \macro_inst|u_reg0|reg_out[31] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[31] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[31] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[31] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[31] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[3] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[3] ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [3]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg0|reg_out[3]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [3]));
defparam \macro_inst|u_reg0|reg_out[3] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[3] .coord_y = 12;
defparam \macro_inst|u_reg0|reg_out[3] .coord_z = 11;
defparam \macro_inst|u_reg0|reg_out[3] .mask = 16'hFF00;
defparam \macro_inst|u_reg0|reg_out[3] .modeMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[3] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[3] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[3] .BypassEn = 1'b0;
defparam \macro_inst|u_reg0|reg_out[3] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[4] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[4] ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [4]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg0|reg_out[4]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [4]));
defparam \macro_inst|u_reg0|reg_out[4] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[4] .coord_y = 10;
defparam \macro_inst|u_reg0|reg_out[4] .coord_z = 3;
defparam \macro_inst|u_reg0|reg_out[4] .mask = 16'hFF00;
defparam \macro_inst|u_reg0|reg_out[4] .modeMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[4] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[4] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[4] .BypassEn = 1'b0;
defparam \macro_inst|u_reg0|reg_out[4] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[5] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[5] ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [5]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg0|reg_out[5]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [5]));
defparam \macro_inst|u_reg0|reg_out[5] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[5] .coord_y = 10;
defparam \macro_inst|u_reg0|reg_out[5] .coord_z = 10;
defparam \macro_inst|u_reg0|reg_out[5] .mask = 16'hFF00;
defparam \macro_inst|u_reg0|reg_out[5] .modeMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[5] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[5] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[5] .BypassEn = 1'b0;
defparam \macro_inst|u_reg0|reg_out[5] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[6] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[6] ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [6]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg0|reg_out[6]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [6]));
defparam \macro_inst|u_reg0|reg_out[6] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[6] .coord_y = 12;
defparam \macro_inst|u_reg0|reg_out[6] .coord_z = 1;
defparam \macro_inst|u_reg0|reg_out[6] .mask = 16'hFF00;
defparam \macro_inst|u_reg0|reg_out[6] .modeMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[6] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[6] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[6] .BypassEn = 1'b0;
defparam \macro_inst|u_reg0|reg_out[6] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[7] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[7] ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [7]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg0|reg_out[7]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [7]));
defparam \macro_inst|u_reg0|reg_out[7] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[7] .coord_y = 10;
defparam \macro_inst|u_reg0|reg_out[7] .coord_z = 7;
defparam \macro_inst|u_reg0|reg_out[7] .mask = 16'hFF00;
defparam \macro_inst|u_reg0|reg_out[7] .modeMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[7] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[7] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[7] .BypassEn = 1'b0;
defparam \macro_inst|u_reg0|reg_out[7] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[8] (
	.A(\macro_inst|u_reg1|reg_out [8]),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[8] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [8]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[8]~58_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [8]));
defparam \macro_inst|u_reg0|reg_out[8] .coord_x = 16;
defparam \macro_inst|u_reg0|reg_out[8] .coord_y = 9;
defparam \macro_inst|u_reg0|reg_out[8] .coord_z = 6;
defparam \macro_inst|u_reg0|reg_out[8] .mask = 16'hB8CC;
defparam \macro_inst|u_reg0|reg_out[8] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[8] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[8] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[8] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[8] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg0|reg_out[9] (
	.A(\macro_inst|u_reg2|reg_out [9]),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[9] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg0|reg_out [9]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg0|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[9]~61_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg0|reg_out [9]));
defparam \macro_inst|u_reg0|reg_out[9] .coord_x = 15;
defparam \macro_inst|u_reg0|reg_out[9] .coord_y = 12;
defparam \macro_inst|u_reg0|reg_out[9] .coord_z = 15;
defparam \macro_inst|u_reg0|reg_out[9] .mask = 16'h30EE;
defparam \macro_inst|u_reg0|reg_out[9] .modeMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[9] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg0|reg_out[9] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg0|reg_out[9] .BypassEn = 1'b1;
defparam \macro_inst|u_reg0|reg_out[9] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|pready (
	.A(\macro_inst|ahb2apb_inst|penable~q ),
	.B(vcc),
	.C(\macro_inst|Equal1~1_combout ),
	.D(\macro_inst|ahb2apb_inst|psel~q ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|pready~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__sys_resetn~clkctrl_outclk_X58_Y2_SIG_INV ),
	.AsyncReset(AsyncReset_X58_Y2_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg1|pready~0_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|pready~q ));
defparam \macro_inst|u_reg1|pready .coord_x = 17;
defparam \macro_inst|u_reg1|pready .coord_y = 10;
defparam \macro_inst|u_reg1|pready .coord_z = 8;
defparam \macro_inst|u_reg1|pready .mask = 16'hAFFF;
defparam \macro_inst|u_reg1|pready .modeMux = 1'b0;
defparam \macro_inst|u_reg1|pready .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|pready .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|pready .BypassEn = 1'b0;
defparam \macro_inst|u_reg1|pready .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[0] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[0] ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [0]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg1|reg_out[0]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [0]));
defparam \macro_inst|u_reg1|reg_out[0] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[0] .coord_y = 10;
defparam \macro_inst|u_reg1|reg_out[0] .coord_z = 4;
defparam \macro_inst|u_reg1|reg_out[0] .mask = 16'hFF00;
defparam \macro_inst|u_reg1|reg_out[0] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[0] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[0] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[0] .BypassEn = 1'b0;
defparam \macro_inst|u_reg1|reg_out[0] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[0]~0 (
	.A(\macro_inst|ahb2apb_inst|penable~q ),
	.B(\macro_inst|ahb2apb_inst|psel~q ),
	.C(\macro_inst|Equal1~1_combout ),
	.D(\macro_inst|ahb2apb_inst|pwrite~q ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg1|reg_out[0]~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_reg1|reg_out[0]~0 .coord_x = 17;
defparam \macro_inst|u_reg1|reg_out[0]~0 .coord_y = 10;
defparam \macro_inst|u_reg1|reg_out[0]~0 .coord_z = 5;
defparam \macro_inst|u_reg1|reg_out[0]~0 .mask = 16'h8000;
defparam \macro_inst|u_reg1|reg_out[0]~0 .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[0]~0 .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[0]~0 .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[0]~0 .BypassEn = 1'b0;
defparam \macro_inst|u_reg1|reg_out[0]~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[10] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[10] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [10]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(SyncReset_X59_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y2_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [10]));
defparam \macro_inst|u_reg1|reg_out[10] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[10] .coord_y = 10;
defparam \macro_inst|u_reg1|reg_out[10] .coord_z = 8;
defparam \macro_inst|u_reg1|reg_out[10] .mask = 16'hFFFF;
defparam \macro_inst|u_reg1|reg_out[10] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[10] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[10] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[10] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[10] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[11] (
	.A(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.B(\macro_inst|apb_prdata[11]~65_combout ),
	.C(\rv32.mem_ahb_hwdata[11] ),
	.D(\macro_inst|u_reg_sram_addr|reg_out [11]),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [11]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(SyncReset_X60_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[11]~66_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [11]));
defparam \macro_inst|u_reg1|reg_out[11] .coord_x = 14;
defparam \macro_inst|u_reg1|reg_out[11] .coord_y = 12;
defparam \macro_inst|u_reg1|reg_out[11] .coord_z = 6;
defparam \macro_inst|u_reg1|reg_out[11] .mask = 16'hEC64;
defparam \macro_inst|u_reg1|reg_out[11] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[11] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[11] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[11] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[11] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[12] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[12] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [12]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X61_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
	.SyncReset(SyncReset_X61_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y1_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [12]));
defparam \macro_inst|u_reg1|reg_out[12] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[12] .coord_y = 8;
defparam \macro_inst|u_reg1|reg_out[12] .coord_z = 12;
defparam \macro_inst|u_reg1|reg_out[12] .mask = 16'hFFFF;
defparam \macro_inst|u_reg1|reg_out[12] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[12] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[12] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[12] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[12] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[13] (
	.A(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.B(\macro_inst|apb_prdata[13]~69_combout ),
	.C(\rv32.mem_ahb_hwdata[13] ),
	.D(\macro_inst|u_reg_sram_addr|reg_out [13]),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [13]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(SyncReset_X60_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[13]~70_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [13]));
defparam \macro_inst|u_reg1|reg_out[13] .coord_x = 14;
defparam \macro_inst|u_reg1|reg_out[13] .coord_y = 12;
defparam \macro_inst|u_reg1|reg_out[13] .coord_z = 9;
defparam \macro_inst|u_reg1|reg_out[13] .mask = 16'hEC64;
defparam \macro_inst|u_reg1|reg_out[13] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[13] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[13] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[13] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[13] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[14] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[14] ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [14]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg1|reg_out[14]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [14]));
defparam \macro_inst|u_reg1|reg_out[14] .coord_x = 15;
defparam \macro_inst|u_reg1|reg_out[14] .coord_y = 8;
defparam \macro_inst|u_reg1|reg_out[14] .coord_z = 2;
defparam \macro_inst|u_reg1|reg_out[14] .mask = 16'hFF00;
defparam \macro_inst|u_reg1|reg_out[14] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[14] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[14] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[14] .BypassEn = 1'b0;
defparam \macro_inst|u_reg1|reg_out[14] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[15] (
	.A(\macro_inst|apb_prdata[15]~74_combout ),
	.B(\macro_inst|u_reg_sram_addr|reg_out [15]),
	.C(\rv32.mem_ahb_hwdata[15] ),
	.D(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [15]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X61_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
	.SyncReset(SyncReset_X61_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[15]~75_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [15]));
defparam \macro_inst|u_reg1|reg_out[15] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[15] .coord_y = 8;
defparam \macro_inst|u_reg1|reg_out[15] .coord_z = 13;
defparam \macro_inst|u_reg1|reg_out[15] .mask = 16'hD8AA;
defparam \macro_inst|u_reg1|reg_out[15] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[15] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[15] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[15] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[15] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[16] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[16] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [16]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(SyncReset_X59_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y2_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [16]));
defparam \macro_inst|u_reg1|reg_out[16] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[16] .coord_y = 10;
defparam \macro_inst|u_reg1|reg_out[16] .coord_z = 14;
defparam \macro_inst|u_reg1|reg_out[16] .mask = 16'hFFFF;
defparam \macro_inst|u_reg1|reg_out[16] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[16] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[16] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[16] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[16] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[17] (
	.A(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.B(\macro_inst|apb_prdata[17]~78_combout ),
	.C(\rv32.mem_ahb_hwdata[17] ),
	.D(\macro_inst|u_reg_sram_addr|reg_out [17]),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [17]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(SyncReset_X60_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[17]~79_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [17]));
defparam \macro_inst|u_reg1|reg_out[17] .coord_x = 14;
defparam \macro_inst|u_reg1|reg_out[17] .coord_y = 12;
defparam \macro_inst|u_reg1|reg_out[17] .coord_z = 3;
defparam \macro_inst|u_reg1|reg_out[17] .mask = 16'hEC64;
defparam \macro_inst|u_reg1|reg_out[17] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[17] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[17] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[17] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[17] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[18] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[18] ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [18]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg1|reg_out[18]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [18]));
defparam \macro_inst|u_reg1|reg_out[18] .coord_x = 14;
defparam \macro_inst|u_reg1|reg_out[18] .coord_y = 12;
defparam \macro_inst|u_reg1|reg_out[18] .coord_z = 1;
defparam \macro_inst|u_reg1|reg_out[18] .mask = 16'hFF00;
defparam \macro_inst|u_reg1|reg_out[18] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[18] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[18] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[18] .BypassEn = 1'b0;
defparam \macro_inst|u_reg1|reg_out[18] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[19] (
	.A(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.B(\macro_inst|apb_prdata[19]~83_combout ),
	.C(\rv32.mem_ahb_hwdata[19] ),
	.D(\macro_inst|u_reg_sram_addr|reg_out [19]),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [19]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(SyncReset_X60_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[19]~84_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [19]));
defparam \macro_inst|u_reg1|reg_out[19] .coord_x = 14;
defparam \macro_inst|u_reg1|reg_out[19] .coord_y = 12;
defparam \macro_inst|u_reg1|reg_out[19] .coord_z = 13;
defparam \macro_inst|u_reg1|reg_out[19] .mask = 16'hEC64;
defparam \macro_inst|u_reg1|reg_out[19] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[19] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[19] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[19] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[19] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[1] (
	.A(\macro_inst|Equal1~1_combout ),
	.B(\macro_inst|Equal0~8_combout ),
	.C(\rv32.mem_ahb_hwdata[1] ),
	.D(\macro_inst|u_reg0|reg_out [1]),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [1]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(SyncReset_X59_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y2_VCC),
	.LutOut(\macro_inst|apb_prdata[1]~37_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [1]));
defparam \macro_inst|u_reg1|reg_out[1] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[1] .coord_y = 10;
defparam \macro_inst|u_reg1|reg_out[1] .coord_z = 12;
defparam \macro_inst|u_reg1|reg_out[1] .mask = 16'hF531;
defparam \macro_inst|u_reg1|reg_out[1] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[1] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[1] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[1] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[1] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[20] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[20] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [20]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X61_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
	.SyncReset(SyncReset_X61_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y1_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [20]));
defparam \macro_inst|u_reg1|reg_out[20] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[20] .coord_y = 8;
defparam \macro_inst|u_reg1|reg_out[20] .coord_z = 6;
defparam \macro_inst|u_reg1|reg_out[20] .mask = 16'hFFFF;
defparam \macro_inst|u_reg1|reg_out[20] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[20] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[20] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[20] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[20] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[21] (
	.A(\macro_inst|apb_prdata[21]~88_combout ),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[21] ),
	.D(\macro_inst|u_reg_sram_addr|reg_out [21]),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [21]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(SyncReset_X60_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[21]~89_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [21]));
defparam \macro_inst|u_reg1|reg_out[21] .coord_x = 14;
defparam \macro_inst|u_reg1|reg_out[21] .coord_y = 12;
defparam \macro_inst|u_reg1|reg_out[21] .coord_z = 11;
defparam \macro_inst|u_reg1|reg_out[21] .mask = 16'hEA62;
defparam \macro_inst|u_reg1|reg_out[21] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[21] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[21] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[21] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[21] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[22] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[22] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [22]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [22]));
defparam \macro_inst|u_reg1|reg_out[22] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[22] .coord_y = 9;
defparam \macro_inst|u_reg1|reg_out[22] .coord_z = 3;
defparam \macro_inst|u_reg1|reg_out[22] .mask = 16'hFFFF;
defparam \macro_inst|u_reg1|reg_out[22] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[22] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[22] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[22] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[22] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[23] (
	.A(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.B(\macro_inst|apb_prdata[23]~93_combout ),
	.C(\rv32.mem_ahb_hwdata[23] ),
	.D(\macro_inst|u_reg_sram_addr|reg_out [23]),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [23]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(SyncReset_X60_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[23]~94_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [23]));
defparam \macro_inst|u_reg1|reg_out[23] .coord_x = 14;
defparam \macro_inst|u_reg1|reg_out[23] .coord_y = 12;
defparam \macro_inst|u_reg1|reg_out[23] .coord_z = 14;
defparam \macro_inst|u_reg1|reg_out[23] .mask = 16'hEC64;
defparam \macro_inst|u_reg1|reg_out[23] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[23] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[23] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[23] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[23] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[24] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[24] ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [24]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg1|reg_out[24]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [24]));
defparam \macro_inst|u_reg1|reg_out[24] .coord_x = 15;
defparam \macro_inst|u_reg1|reg_out[24] .coord_y = 9;
defparam \macro_inst|u_reg1|reg_out[24] .coord_z = 11;
defparam \macro_inst|u_reg1|reg_out[24] .mask = 16'hFF00;
defparam \macro_inst|u_reg1|reg_out[24] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[24] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[24] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[24] .BypassEn = 1'b0;
defparam \macro_inst|u_reg1|reg_out[24] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[25] (
	.A(\macro_inst|apb_prdata[25]~98_combout ),
	.B(\macro_inst|u_reg_sram_addr|reg_out [25]),
	.C(\rv32.mem_ahb_hwdata[25] ),
	.D(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [25]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[25]~99_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [25]));
defparam \macro_inst|u_reg1|reg_out[25] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[25] .coord_y = 9;
defparam \macro_inst|u_reg1|reg_out[25] .coord_z = 15;
defparam \macro_inst|u_reg1|reg_out[25] .mask = 16'hD8AA;
defparam \macro_inst|u_reg1|reg_out[25] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[25] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[25] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[25] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[25] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[26] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[26] ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [26]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg1|reg_out[26]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [26]));
defparam \macro_inst|u_reg1|reg_out[26] .coord_x = 15;
defparam \macro_inst|u_reg1|reg_out[26] .coord_y = 9;
defparam \macro_inst|u_reg1|reg_out[26] .coord_z = 14;
defparam \macro_inst|u_reg1|reg_out[26] .mask = 16'hFF00;
defparam \macro_inst|u_reg1|reg_out[26] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[26] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[26] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[26] .BypassEn = 1'b0;
defparam \macro_inst|u_reg1|reg_out[26] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[27] (
	.A(\macro_inst|apb_prdata[27]~102_combout ),
	.B(\macro_inst|u_reg_sram_addr|reg_out [27]),
	.C(\rv32.mem_ahb_hwdata[27] ),
	.D(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [27]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[27]~103_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [27]));
defparam \macro_inst|u_reg1|reg_out[27] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[27] .coord_y = 9;
defparam \macro_inst|u_reg1|reg_out[27] .coord_z = 5;
defparam \macro_inst|u_reg1|reg_out[27] .mask = 16'hD8AA;
defparam \macro_inst|u_reg1|reg_out[27] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[27] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[27] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[27] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[27] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[28] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[28] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [28]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(SyncReset_X57_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y3_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [28]));
defparam \macro_inst|u_reg1|reg_out[28] .coord_x = 15;
defparam \macro_inst|u_reg1|reg_out[28] .coord_y = 9;
defparam \macro_inst|u_reg1|reg_out[28] .coord_z = 9;
defparam \macro_inst|u_reg1|reg_out[28] .mask = 16'hFFFF;
defparam \macro_inst|u_reg1|reg_out[28] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[28] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[28] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[28] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[28] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[29] (
	.A(\macro_inst|apb_prdata[29]~106_combout ),
	.B(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.C(\rv32.mem_ahb_hwdata[29] ),
	.D(\macro_inst|u_reg_sram_addr|reg_out [29]),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [29]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[29]~107_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [29]));
defparam \macro_inst|u_reg1|reg_out[29] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[29] .coord_y = 9;
defparam \macro_inst|u_reg1|reg_out[29] .coord_z = 8;
defparam \macro_inst|u_reg1|reg_out[29] .mask = 16'hEA62;
defparam \macro_inst|u_reg1|reg_out[29] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[29] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[29] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[29] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[29] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[2] (
	.A(\macro_inst|Equal0~8_combout ),
	.B(\macro_inst|u_reg0|reg_out [2]),
	.C(\rv32.mem_ahb_hwdata[2] ),
	.D(\macro_inst|Equal1~1_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [2]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(SyncReset_X59_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[2]~40_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [2]));
defparam \macro_inst|u_reg1|reg_out[2] .coord_x = 15;
defparam \macro_inst|u_reg1|reg_out[2] .coord_y = 8;
defparam \macro_inst|u_reg1|reg_out[2] .coord_z = 4;
defparam \macro_inst|u_reg1|reg_out[2] .mask = 16'hD0DD;
defparam \macro_inst|u_reg1|reg_out[2] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[2] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[2] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[2] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[2] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[30] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[30] ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [30]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg1|reg_out[30]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [30]));
defparam \macro_inst|u_reg1|reg_out[30] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[30] .coord_y = 9;
defparam \macro_inst|u_reg1|reg_out[30] .coord_z = 9;
defparam \macro_inst|u_reg1|reg_out[30] .mask = 16'hFF00;
defparam \macro_inst|u_reg1|reg_out[30] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[30] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[30] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[30] .BypassEn = 1'b0;
defparam \macro_inst|u_reg1|reg_out[30] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[31] (
	.A(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.B(\macro_inst|apb_prdata[31]~111_combout ),
	.C(\rv32.mem_ahb_hwdata[31] ),
	.D(\macro_inst|u_reg_sram_addr|reg_out [31]),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [31]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X58_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
	.SyncReset(SyncReset_X58_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X58_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[31]~112_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [31]));
defparam \macro_inst|u_reg1|reg_out[31] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[31] .coord_y = 9;
defparam \macro_inst|u_reg1|reg_out[31] .coord_z = 4;
defparam \macro_inst|u_reg1|reg_out[31] .mask = 16'hEC64;
defparam \macro_inst|u_reg1|reg_out[31] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[31] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[31] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[31] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[31] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[3] (
	.A(\macro_inst|Equal0~8_combout ),
	.B(\macro_inst|u_reg0|reg_out [3]),
	.C(\rv32.mem_ahb_hwdata[3] ),
	.D(\macro_inst|Equal1~1_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [3]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(SyncReset_X59_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[3]~43_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [3]));
defparam \macro_inst|u_reg1|reg_out[3] .coord_x = 15;
defparam \macro_inst|u_reg1|reg_out[3] .coord_y = 8;
defparam \macro_inst|u_reg1|reg_out[3] .coord_z = 9;
defparam \macro_inst|u_reg1|reg_out[3] .mask = 16'hD0DD;
defparam \macro_inst|u_reg1|reg_out[3] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[3] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[3] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[3] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[3] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[4] (
	.A(\macro_inst|Equal1~1_combout ),
	.B(\macro_inst|Equal0~8_combout ),
	.C(\rv32.mem_ahb_hwdata[4] ),
	.D(\macro_inst|u_reg0|reg_out [4]),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [4]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(SyncReset_X59_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y2_VCC),
	.LutOut(\macro_inst|apb_prdata[4]~47_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [4]));
defparam \macro_inst|u_reg1|reg_out[4] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[4] .coord_y = 10;
defparam \macro_inst|u_reg1|reg_out[4] .coord_z = 0;
defparam \macro_inst|u_reg1|reg_out[4] .mask = 16'hECA0;
defparam \macro_inst|u_reg1|reg_out[4] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[4] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[4] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[4] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[4] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[5] (
	.A(\macro_inst|Equal1~1_combout ),
	.B(\macro_inst|u_reg0|reg_out [5]),
	.C(\rv32.mem_ahb_hwdata[5] ),
	.D(\macro_inst|Equal0~8_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [5]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(SyncReset_X59_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y2_VCC),
	.LutOut(\macro_inst|apb_prdata[5]~49_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [5]));
defparam \macro_inst|u_reg1|reg_out[5] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[5] .coord_y = 10;
defparam \macro_inst|u_reg1|reg_out[5] .coord_z = 11;
defparam \macro_inst|u_reg1|reg_out[5] .mask = 16'hC4F5;
defparam \macro_inst|u_reg1|reg_out[5] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[5] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[5] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[5] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[5] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[6] (
	.A(\macro_inst|Equal0~8_combout ),
	.B(\macro_inst|u_reg0|reg_out [6]),
	.C(\rv32.mem_ahb_hwdata[6] ),
	.D(\macro_inst|Equal1~1_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [6]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(SyncReset_X59_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[6]~52_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [6]));
defparam \macro_inst|u_reg1|reg_out[6] .coord_x = 15;
defparam \macro_inst|u_reg1|reg_out[6] .coord_y = 8;
defparam \macro_inst|u_reg1|reg_out[6] .coord_z = 13;
defparam \macro_inst|u_reg1|reg_out[6] .mask = 16'hD0DD;
defparam \macro_inst|u_reg1|reg_out[6] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[6] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[6] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[6] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[6] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[7] (
	.A(\macro_inst|Equal1~1_combout ),
	.B(\macro_inst|Equal0~8_combout ),
	.C(\rv32.mem_ahb_hwdata[7] ),
	.D(\macro_inst|u_reg0|reg_out [7]),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [7]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X59_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
	.SyncReset(SyncReset_X59_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y2_VCC),
	.LutOut(\macro_inst|apb_prdata[7]~55_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [7]));
defparam \macro_inst|u_reg1|reg_out[7] .coord_x = 16;
defparam \macro_inst|u_reg1|reg_out[7] .coord_y = 10;
defparam \macro_inst|u_reg1|reg_out[7] .coord_z = 13;
defparam \macro_inst|u_reg1|reg_out[7] .mask = 16'hF531;
defparam \macro_inst|u_reg1|reg_out[7] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[7] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[7] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[7] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[7] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[8] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[8] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [8]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(SyncReset_X57_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y3_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [8]));
defparam \macro_inst|u_reg1|reg_out[8] .coord_x = 15;
defparam \macro_inst|u_reg1|reg_out[8] .coord_y = 9;
defparam \macro_inst|u_reg1|reg_out[8] .coord_z = 4;
defparam \macro_inst|u_reg1|reg_out[8] .mask = 16'hFFFF;
defparam \macro_inst|u_reg1|reg_out[8] .modeMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[8] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[8] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[8] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[8] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg1|reg_out[9] (
	.A(\macro_inst|ahb2apb_inst|prdata[19]~0_combout ),
	.B(\macro_inst|u_reg_sram_addr|reg_out [9]),
	.C(\rv32.mem_ahb_hwdata[9] ),
	.D(\macro_inst|apb_prdata[9]~61_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg1|reg_out [9]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg1|reg_out[0]~0_combout_X60_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
	.SyncReset(SyncReset_X60_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[9]~62_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg1|reg_out [9]));
defparam \macro_inst|u_reg1|reg_out[9] .coord_x = 14;
defparam \macro_inst|u_reg1|reg_out[9] .coord_y = 12;
defparam \macro_inst|u_reg1|reg_out[9] .coord_z = 8;
defparam \macro_inst|u_reg1|reg_out[9] .mask = 16'hDDA0;
defparam \macro_inst|u_reg1|reg_out[9] .modeMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[9] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg1|reg_out[9] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg1|reg_out[9] .BypassEn = 1'b1;
defparam \macro_inst|u_reg1|reg_out[9] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|pready (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg2|pready~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|pready~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__sys_resetn~clkctrl_outclk_X61_Y2_SIG_INV ),
	.AsyncReset(AsyncReset_X61_Y2_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg2|pready~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|pready~q ));
defparam \macro_inst|u_reg2|pready .coord_x = 18;
defparam \macro_inst|u_reg2|pready .coord_y = 12;
defparam \macro_inst|u_reg2|pready .coord_z = 10;
defparam \macro_inst|u_reg2|pready .mask = 16'hFF00;
defparam \macro_inst|u_reg2|pready .modeMux = 1'b0;
defparam \macro_inst|u_reg2|pready .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|pready .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|pready .BypassEn = 1'b0;
defparam \macro_inst|u_reg2|pready .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[0] (
	.A(\macro_inst|apb_prdata[0]~34_combout ),
	.B(\macro_inst|apb_prdata[0]~35_combout ),
	.C(\rv32.mem_ahb_hwdata[0] ),
	.D(\macro_inst|Equal2~1_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [0]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(SyncReset_X57_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[0]~36_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [0]));
defparam \macro_inst|u_reg2|reg_out[0] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[0] .coord_y = 9;
defparam \macro_inst|u_reg2|reg_out[0] .coord_z = 13;
defparam \macro_inst|u_reg2|reg_out[0] .mask = 16'h8088;
defparam \macro_inst|u_reg2|reg_out[0] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[0] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[0] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[0] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[0] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[0]~0 (
	.A(\macro_inst|ahb2apb_inst|pwrite~q ),
	.B(\macro_inst|Equal2~1_combout ),
	.C(\macro_inst|ahb2apb_inst|penable~q ),
	.D(\macro_inst|ahb2apb_inst|psel~q ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg2|reg_out[0]~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_reg2|reg_out[0]~0 .coord_x = 18;
defparam \macro_inst|u_reg2|reg_out[0]~0 .coord_y = 10;
defparam \macro_inst|u_reg2|reg_out[0]~0 .coord_z = 5;
defparam \macro_inst|u_reg2|reg_out[0]~0 .mask = 16'h8000;
defparam \macro_inst|u_reg2|reg_out[0]~0 .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[0]~0 .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[0]~0 .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[0]~0 .BypassEn = 1'b0;
defparam \macro_inst|u_reg2|reg_out[0]~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[10] (
	.A(\macro_inst|apb_prdata[10]~63_combout ),
	.B(\macro_inst|u_reg_sram_addr|reg_out [10]),
	.C(\rv32.mem_ahb_hwdata[10] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [10]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(SyncReset_X57_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[10]~64_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [10]));
defparam \macro_inst|u_reg2|reg_out[10] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[10] .coord_y = 9;
defparam \macro_inst|u_reg2|reg_out[10] .coord_z = 2;
defparam \macro_inst|u_reg2|reg_out[10] .mask = 16'hAAD8;
defparam \macro_inst|u_reg2|reg_out[10] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[10] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[10] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[10] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[10] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[11] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[11] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [11]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [11]));
defparam \macro_inst|u_reg2|reg_out[11] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[11] .coord_y = 12;
defparam \macro_inst|u_reg2|reg_out[11] .coord_z = 5;
defparam \macro_inst|u_reg2|reg_out[11] .mask = 16'hFFFF;
defparam \macro_inst|u_reg2|reg_out[11] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[11] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[11] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[11] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[11] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[12] (
	.A(\macro_inst|apb_prdata[12]~67_combout ),
	.B(\macro_inst|u_reg_sram_addr|reg_out [12]),
	.C(\rv32.mem_ahb_hwdata[12] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [12]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(SyncReset_X59_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[12]~68_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [12]));
defparam \macro_inst|u_reg2|reg_out[12] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[12] .coord_y = 8;
defparam \macro_inst|u_reg2|reg_out[12] .coord_z = 11;
defparam \macro_inst|u_reg2|reg_out[12] .mask = 16'hAAD8;
defparam \macro_inst|u_reg2|reg_out[12] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[12] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[12] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[12] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[12] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[13] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[13] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [13]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [13]));
defparam \macro_inst|u_reg2|reg_out[13] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[13] .coord_y = 12;
defparam \macro_inst|u_reg2|reg_out[13] .coord_z = 0;
defparam \macro_inst|u_reg2|reg_out[13] .mask = 16'hFFFF;
defparam \macro_inst|u_reg2|reg_out[13] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[13] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[13] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[13] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[13] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[14] (
	.A(\macro_inst|apb_prdata[14]~71_combout ),
	.B(\macro_inst|u_reg_sram_addr|reg_out [14]),
	.C(\rv32.mem_ahb_hwdata[14] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [14]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(SyncReset_X59_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[14]~72_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [14]));
defparam \macro_inst|u_reg2|reg_out[14] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[14] .coord_y = 8;
defparam \macro_inst|u_reg2|reg_out[14] .coord_z = 7;
defparam \macro_inst|u_reg2|reg_out[14] .mask = 16'hAAD8;
defparam \macro_inst|u_reg2|reg_out[14] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[14] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[14] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[14] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[14] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[15] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[15] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [15]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(SyncReset_X59_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y1_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [15]));
defparam \macro_inst|u_reg2|reg_out[15] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[15] .coord_y = 8;
defparam \macro_inst|u_reg2|reg_out[15] .coord_z = 14;
defparam \macro_inst|u_reg2|reg_out[15] .mask = 16'hFFFF;
defparam \macro_inst|u_reg2|reg_out[15] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[15] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[15] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[15] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[15] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[16] (
	.A(\macro_inst|u_reg_sram_addr|reg_out [16]),
	.B(\macro_inst|apb_prdata[16]~76_combout ),
	.C(\rv32.mem_ahb_hwdata[16] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [16]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(SyncReset_X59_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[16]~77_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [16]));
defparam \macro_inst|u_reg2|reg_out[16] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[16] .coord_y = 8;
defparam \macro_inst|u_reg2|reg_out[16] .coord_z = 3;
defparam \macro_inst|u_reg2|reg_out[16] .mask = 16'hCCB8;
defparam \macro_inst|u_reg2|reg_out[16] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[16] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[16] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[16] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[16] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[17] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[17] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [17]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [17]));
defparam \macro_inst|u_reg2|reg_out[17] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[17] .coord_y = 12;
defparam \macro_inst|u_reg2|reg_out[17] .coord_z = 12;
defparam \macro_inst|u_reg2|reg_out[17] .mask = 16'hFFFF;
defparam \macro_inst|u_reg2|reg_out[17] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[17] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[17] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[17] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[17] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[18] (
	.A(\macro_inst|u_reg_sram_addr|reg_out [18]),
	.B(\macro_inst|apb_prdata[18]~81_combout ),
	.C(\rv32.mem_ahb_hwdata[18] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [18]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[18]~82_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [18]));
defparam \macro_inst|u_reg2|reg_out[18] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[18] .coord_y = 12;
defparam \macro_inst|u_reg2|reg_out[18] .coord_z = 2;
defparam \macro_inst|u_reg2|reg_out[18] .mask = 16'hCCB8;
defparam \macro_inst|u_reg2|reg_out[18] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[18] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[18] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[18] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[18] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[19] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[19] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [19]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [19]));
defparam \macro_inst|u_reg2|reg_out[19] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[19] .coord_y = 12;
defparam \macro_inst|u_reg2|reg_out[19] .coord_z = 9;
defparam \macro_inst|u_reg2|reg_out[19] .mask = 16'hFFFF;
defparam \macro_inst|u_reg2|reg_out[19] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[19] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[19] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[19] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[19] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[1] (
	.A(\macro_inst|apb_prdata[1]~38_combout ),
	.B(\macro_inst|apb_prdata[1]~37_combout ),
	.C(\rv32.mem_ahb_hwdata[1] ),
	.D(\macro_inst|Equal2~1_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [1]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
	.SyncReset(SyncReset_X57_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y2_VCC),
	.LutOut(\macro_inst|apb_prdata[1]~39_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [1]));
defparam \macro_inst|u_reg2|reg_out[1] .coord_x = 18;
defparam \macro_inst|u_reg2|reg_out[1] .coord_y = 10;
defparam \macro_inst|u_reg2|reg_out[1] .coord_z = 6;
defparam \macro_inst|u_reg2|reg_out[1] .mask = 16'h8088;
defparam \macro_inst|u_reg2|reg_out[1] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[1] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[1] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[1] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[1] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[20] (
	.A(\macro_inst|apb_prdata[20]~85_combout ),
	.B(\macro_inst|u_reg_sram_addr|reg_out [20]),
	.C(\rv32.mem_ahb_hwdata[20] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [20]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(SyncReset_X59_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[20]~86_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [20]));
defparam \macro_inst|u_reg2|reg_out[20] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[20] .coord_y = 8;
defparam \macro_inst|u_reg2|reg_out[20] .coord_z = 5;
defparam \macro_inst|u_reg2|reg_out[20] .mask = 16'hAAD8;
defparam \macro_inst|u_reg2|reg_out[20] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[20] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[20] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[20] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[20] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[21] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[21] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [21]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
	.SyncReset(SyncReset_X57_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y2_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [21]));
defparam \macro_inst|u_reg2|reg_out[21] .coord_x = 18;
defparam \macro_inst|u_reg2|reg_out[21] .coord_y = 10;
defparam \macro_inst|u_reg2|reg_out[21] .coord_z = 12;
defparam \macro_inst|u_reg2|reg_out[21] .mask = 16'hFFFF;
defparam \macro_inst|u_reg2|reg_out[21] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[21] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[21] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[21] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[21] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[22] (
	.A(\macro_inst|apb_prdata[22]~90_combout ),
	.B(\macro_inst|u_reg_sram_addr|reg_out [22]),
	.C(\rv32.mem_ahb_hwdata[22] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [22]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(SyncReset_X57_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[22]~91_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [22]));
defparam \macro_inst|u_reg2|reg_out[22] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[22] .coord_y = 9;
defparam \macro_inst|u_reg2|reg_out[22] .coord_z = 3;
defparam \macro_inst|u_reg2|reg_out[22] .mask = 16'hAAD8;
defparam \macro_inst|u_reg2|reg_out[22] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[22] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[22] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[22] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[22] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[23] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[23] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [23]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [23]));
defparam \macro_inst|u_reg2|reg_out[23] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[23] .coord_y = 12;
defparam \macro_inst|u_reg2|reg_out[23] .coord_z = 6;
defparam \macro_inst|u_reg2|reg_out[23] .mask = 16'hFFFF;
defparam \macro_inst|u_reg2|reg_out[23] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[23] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[23] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[23] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[23] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[24] (
	.A(\macro_inst|u_reg_sram_addr|reg_out [24]),
	.B(\macro_inst|apb_prdata[24]~95_combout ),
	.C(\rv32.mem_ahb_hwdata[24] ),
	.D(\macro_inst|WideNor0~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [24]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(SyncReset_X57_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[24]~96_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [24]));
defparam \macro_inst|u_reg2|reg_out[24] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[24] .coord_y = 9;
defparam \macro_inst|u_reg2|reg_out[24] .coord_z = 0;
defparam \macro_inst|u_reg2|reg_out[24] .mask = 16'hCCB8;
defparam \macro_inst|u_reg2|reg_out[24] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[24] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[24] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[24] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[24] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[25] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[25] ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [25]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg2|reg_out[25]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [25]));
defparam \macro_inst|u_reg2|reg_out[25] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[25] .coord_y = 9;
defparam \macro_inst|u_reg2|reg_out[25] .coord_z = 12;
defparam \macro_inst|u_reg2|reg_out[25] .mask = 16'hFF00;
defparam \macro_inst|u_reg2|reg_out[25] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[25] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[25] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[25] .BypassEn = 1'b0;
defparam \macro_inst|u_reg2|reg_out[25] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[26] (
	.A(\macro_inst|WideNor0~0_combout ),
	.B(\macro_inst|u_reg_sram_addr|reg_out [26]),
	.C(\rv32.mem_ahb_hwdata[26] ),
	.D(\macro_inst|apb_prdata[26]~100_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [26]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(SyncReset_X57_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[26]~101_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [26]));
defparam \macro_inst|u_reg2|reg_out[26] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[26] .coord_y = 9;
defparam \macro_inst|u_reg2|reg_out[26] .coord_z = 7;
defparam \macro_inst|u_reg2|reg_out[26] .mask = 16'hEE50;
defparam \macro_inst|u_reg2|reg_out[26] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[26] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[26] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[26] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[26] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[27] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[27] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [27]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(SyncReset_X57_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y3_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [27]));
defparam \macro_inst|u_reg2|reg_out[27] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[27] .coord_y = 9;
defparam \macro_inst|u_reg2|reg_out[27] .coord_z = 6;
defparam \macro_inst|u_reg2|reg_out[27] .mask = 16'hFFFF;
defparam \macro_inst|u_reg2|reg_out[27] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[27] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[27] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[27] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[27] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[28] (
	.A(\macro_inst|apb_prdata[28]~104_combout ),
	.B(\macro_inst|WideNor0~0_combout ),
	.C(\rv32.mem_ahb_hwdata[28] ),
	.D(\macro_inst|u_reg_sram_addr|reg_out [28]),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [28]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(SyncReset_X57_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[28]~105_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [28]));
defparam \macro_inst|u_reg2|reg_out[28] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[28] .coord_y = 9;
defparam \macro_inst|u_reg2|reg_out[28] .coord_z = 15;
defparam \macro_inst|u_reg2|reg_out[28] .mask = 16'hBA98;
defparam \macro_inst|u_reg2|reg_out[28] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[28] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[28] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[28] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[28] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[29] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[29] ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [29]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg2|reg_out[29]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [29]));
defparam \macro_inst|u_reg2|reg_out[29] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[29] .coord_y = 9;
defparam \macro_inst|u_reg2|reg_out[29] .coord_z = 1;
defparam \macro_inst|u_reg2|reg_out[29] .mask = 16'hFF00;
defparam \macro_inst|u_reg2|reg_out[29] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[29] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[29] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[29] .BypassEn = 1'b0;
defparam \macro_inst|u_reg2|reg_out[29] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[2] (
	.A(\macro_inst|apb_prdata[2]~40_combout ),
	.B(\macro_inst|apb_prdata[2]~41_combout ),
	.C(\rv32.mem_ahb_hwdata[2] ),
	.D(\macro_inst|Equal2~1_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [2]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(SyncReset_X59_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[2]~42_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [2]));
defparam \macro_inst|u_reg2|reg_out[2] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[2] .coord_y = 8;
defparam \macro_inst|u_reg2|reg_out[2] .coord_z = 1;
defparam \macro_inst|u_reg2|reg_out[2] .mask = 16'h8088;
defparam \macro_inst|u_reg2|reg_out[2] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[2] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[2] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[2] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[2] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[30] (
	.A(\macro_inst|WideNor0~0_combout ),
	.B(\macro_inst|apb_prdata[30]~109_combout ),
	.C(\rv32.mem_ahb_hwdata[30] ),
	.D(\macro_inst|u_reg_sram_addr|reg_out [30]),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [30]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(SyncReset_X57_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[30]~110_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [30]));
defparam \macro_inst|u_reg2|reg_out[30] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[30] .coord_y = 9;
defparam \macro_inst|u_reg2|reg_out[30] .coord_z = 5;
defparam \macro_inst|u_reg2|reg_out[30] .mask = 16'hDC98;
defparam \macro_inst|u_reg2|reg_out[30] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[30] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[30] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[30] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[30] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[31] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[31] ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [31]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg2|reg_out[31]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [31]));
defparam \macro_inst|u_reg2|reg_out[31] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[31] .coord_y = 9;
defparam \macro_inst|u_reg2|reg_out[31] .coord_z = 10;
defparam \macro_inst|u_reg2|reg_out[31] .mask = 16'hFF00;
defparam \macro_inst|u_reg2|reg_out[31] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[31] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[31] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[31] .BypassEn = 1'b0;
defparam \macro_inst|u_reg2|reg_out[31] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[3] (
	.A(\macro_inst|apb_prdata[3]~44_combout ),
	.B(\macro_inst|apb_prdata[3]~43_combout ),
	.C(\rv32.mem_ahb_hwdata[3] ),
	.D(\macro_inst|Equal2~1_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [3]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(SyncReset_X59_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[3]~45_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [3]));
defparam \macro_inst|u_reg2|reg_out[3] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[3] .coord_y = 8;
defparam \macro_inst|u_reg2|reg_out[3] .coord_z = 8;
defparam \macro_inst|u_reg2|reg_out[3] .mask = 16'h8088;
defparam \macro_inst|u_reg2|reg_out[3] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[3] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[3] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[3] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[3] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[4] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[4] ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [4]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg2|reg_out[4]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [4]));
defparam \macro_inst|u_reg2|reg_out[4] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[4] .coord_y = 8;
defparam \macro_inst|u_reg2|reg_out[4] .coord_z = 15;
defparam \macro_inst|u_reg2|reg_out[4] .mask = 16'hFF00;
defparam \macro_inst|u_reg2|reg_out[4] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[4] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[4] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[4] .BypassEn = 1'b0;
defparam \macro_inst|u_reg2|reg_out[4] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[5] (
	.A(\macro_inst|apb_prdata[5]~49_combout ),
	.B(\macro_inst|apb_prdata[5]~50_combout ),
	.C(\rv32.mem_ahb_hwdata[5] ),
	.D(\macro_inst|Equal2~1_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [5]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(SyncReset_X59_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[5]~51_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [5]));
defparam \macro_inst|u_reg2|reg_out[5] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[5] .coord_y = 8;
defparam \macro_inst|u_reg2|reg_out[5] .coord_z = 10;
defparam \macro_inst|u_reg2|reg_out[5] .mask = 16'h8088;
defparam \macro_inst|u_reg2|reg_out[5] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[5] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[5] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[5] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[5] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[6] (
	.A(\macro_inst|apb_prdata[6]~53_combout ),
	.B(\macro_inst|apb_prdata[6]~52_combout ),
	.C(\rv32.mem_ahb_hwdata[6] ),
	.D(\macro_inst|Equal2~1_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [6]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X59_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
	.SyncReset(SyncReset_X59_Y1_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X59_Y1_VCC),
	.LutOut(\macro_inst|apb_prdata[6]~54_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [6]));
defparam \macro_inst|u_reg2|reg_out[6] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[6] .coord_y = 8;
defparam \macro_inst|u_reg2|reg_out[6] .coord_z = 12;
defparam \macro_inst|u_reg2|reg_out[6] .mask = 16'h8088;
defparam \macro_inst|u_reg2|reg_out[6] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[6] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[6] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[6] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[6] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[7] (
	.A(\macro_inst|apb_prdata[7]~56_combout ),
	.B(\macro_inst|apb_prdata[7]~55_combout ),
	.C(\rv32.mem_ahb_hwdata[7] ),
	.D(\macro_inst|Equal2~1_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [7]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y2_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
	.SyncReset(SyncReset_X57_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y2_VCC),
	.LutOut(\macro_inst|apb_prdata[7]~57_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [7]));
defparam \macro_inst|u_reg2|reg_out[7] .coord_x = 18;
defparam \macro_inst|u_reg2|reg_out[7] .coord_y = 10;
defparam \macro_inst|u_reg2|reg_out[7] .coord_z = 10;
defparam \macro_inst|u_reg2|reg_out[7] .mask = 16'h8088;
defparam \macro_inst|u_reg2|reg_out[7] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[7] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[7] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[7] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[7] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[8] (
	.A(\macro_inst|u_reg_sram_addr|reg_out [8]),
	.B(\macro_inst|WideNor0~0_combout ),
	.C(\rv32.mem_ahb_hwdata[8] ),
	.D(\macro_inst|apb_prdata[8]~58_combout ),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [8]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X57_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
	.SyncReset(SyncReset_X57_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y3_VCC),
	.LutOut(\macro_inst|apb_prdata[8]~59_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [8]));
defparam \macro_inst|u_reg2|reg_out[8] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[8] .coord_y = 9;
defparam \macro_inst|u_reg2|reg_out[8] .coord_z = 8;
defparam \macro_inst|u_reg2|reg_out[8] .mask = 16'hEE30;
defparam \macro_inst|u_reg2|reg_out[8] .modeMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[8] .FeedbackMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[8] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[8] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[8] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg2|reg_out[9] (
	.A(),
	.B(),
	.C(\rv32.mem_ahb_hwdata[9] ),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_reg2|reg_out [9]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg2|reg_out[0]~0_combout_X61_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
	.SyncReset(SyncReset_X61_Y3_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y3_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_reg2|reg_out [9]));
defparam \macro_inst|u_reg2|reg_out[9] .coord_x = 15;
defparam \macro_inst|u_reg2|reg_out[9] .coord_y = 12;
defparam \macro_inst|u_reg2|reg_out[9] .coord_z = 14;
defparam \macro_inst|u_reg2|reg_out[9] .mask = 16'hFFFF;
defparam \macro_inst|u_reg2|reg_out[9] .modeMux = 1'b1;
defparam \macro_inst|u_reg2|reg_out[9] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[9] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg2|reg_out[9] .BypassEn = 1'b1;
defparam \macro_inst|u_reg2|reg_out[9] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg_sram_addr|pready (
	.A(\macro_inst|ahb2apb_inst|penable~q ),
	.B(\macro_inst|Equal3~0_combout ),
	.C(\macro_inst|ahb2apb_inst|paddr [2]),
	.D(\macro_inst|ahb2apb_inst|psel~q ),
	.Cin(),
	.Qin(\macro_inst|u_reg_sram_addr|pready~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__sys_resetn~clkctrl_outclk_X58_Y2_SIG_INV ),
	.AsyncReset(AsyncReset_X58_Y2_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg_sram_addr|pready~0_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg_sram_addr|pready~q ));
defparam \macro_inst|u_reg_sram_addr|pready .coord_x = 17;
defparam \macro_inst|u_reg_sram_addr|pready .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|pready .coord_z = 12;
defparam \macro_inst|u_reg_sram_addr|pready .mask = 16'hFBFF;
defparam \macro_inst|u_reg_sram_addr|pready .modeMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|pready .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|pready .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|pready .BypassEn = 1'b0;
defparam \macro_inst|u_reg_sram_addr|pready .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[0] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [0]),
	.C(\rv32.mem_ahb_hwdata[0] ),
	.D(vcc),
	.Cin(),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [0]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[0]~32_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[0]~33 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [0]));
defparam \macro_inst|u_reg_sram_addr|reg_out[0] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[0] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[0] .coord_z = 0;
defparam \macro_inst|u_reg_sram_addr|reg_out[0] .mask = 16'h33CC;
defparam \macro_inst|u_reg_sram_addr|reg_out[0] .modeMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[0] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[0] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[0] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[0] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[10] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [10]),
	.C(\rv32.mem_ahb_hwdata[10] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[9]~53 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [10]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[10]~54_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[10]~55 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [10]));
defparam \macro_inst|u_reg_sram_addr|reg_out[10] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[10] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[10] .coord_z = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[10] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[10] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[10] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[10] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[10] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[10] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[11] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [11]),
	.C(\rv32.mem_ahb_hwdata[11] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[10]~55 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [11]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[11]~56_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[11]~57 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [11]));
defparam \macro_inst|u_reg_sram_addr|reg_out[11] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[11] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[11] .coord_z = 11;
defparam \macro_inst|u_reg_sram_addr|reg_out[11] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[11] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[11] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[11] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[11] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[11] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[12] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [12]),
	.C(\rv32.mem_ahb_hwdata[12] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[11]~57 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [12]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[12]~58_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[12]~59 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [12]));
defparam \macro_inst|u_reg_sram_addr|reg_out[12] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[12] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[12] .coord_z = 12;
defparam \macro_inst|u_reg_sram_addr|reg_out[12] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[12] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[12] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[12] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[12] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[12] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[13] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [13]),
	.C(\rv32.mem_ahb_hwdata[13] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[12]~59 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [13]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[13]~60_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[13]~61 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [13]));
defparam \macro_inst|u_reg_sram_addr|reg_out[13] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[13] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[13] .coord_z = 13;
defparam \macro_inst|u_reg_sram_addr|reg_out[13] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[13] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[13] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[13] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[13] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[13] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[14] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [14]),
	.C(\rv32.mem_ahb_hwdata[14] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[13]~61 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [14]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[14]~62_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[14]~63 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [14]));
defparam \macro_inst|u_reg_sram_addr|reg_out[14] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[14] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[14] .coord_z = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[14] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[14] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[14] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[14] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[14] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[14] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[15] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [15]),
	.C(\rv32.mem_ahb_hwdata[15] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[14]~63 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [15]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[15]~64_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[15]~65 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [15]));
defparam \macro_inst|u_reg_sram_addr|reg_out[15] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[15] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[15] .coord_z = 15;
defparam \macro_inst|u_reg_sram_addr|reg_out[15] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[15] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[15] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[15] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[15] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[15] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[16] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [16]),
	.C(\rv32.mem_ahb_hwdata[16] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[15]~65 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [16]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[16]~66_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[16]~67 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [16]));
defparam \macro_inst|u_reg_sram_addr|reg_out[16] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[16] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[16] .coord_z = 0;
defparam \macro_inst|u_reg_sram_addr|reg_out[16] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[16] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[16] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[16] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[16] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[16] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[17] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [17]),
	.C(\rv32.mem_ahb_hwdata[17] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[16]~67 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [17]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[17]~68_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[17]~69 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [17]));
defparam \macro_inst|u_reg_sram_addr|reg_out[17] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[17] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[17] .coord_z = 1;
defparam \macro_inst|u_reg_sram_addr|reg_out[17] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[17] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[17] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[17] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[17] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[17] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[18] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [18]),
	.C(\rv32.mem_ahb_hwdata[18] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[17]~69 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [18]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[18]~70_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[18]~71 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [18]));
defparam \macro_inst|u_reg_sram_addr|reg_out[18] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[18] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[18] .coord_z = 2;
defparam \macro_inst|u_reg_sram_addr|reg_out[18] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[18] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[18] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[18] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[18] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[18] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[19] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [19]),
	.C(\rv32.mem_ahb_hwdata[19] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[18]~71 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [19]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[19]~72_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[19]~73 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [19]));
defparam \macro_inst|u_reg_sram_addr|reg_out[19] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[19] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[19] .coord_z = 3;
defparam \macro_inst|u_reg_sram_addr|reg_out[19] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[19] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[19] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[19] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[19] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[19] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[1] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [1]),
	.C(\rv32.mem_ahb_hwdata[1] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[0]~33 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [1]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[1]~36_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[1]~37 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [1]));
defparam \macro_inst|u_reg_sram_addr|reg_out[1] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[1] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[1] .coord_z = 1;
defparam \macro_inst|u_reg_sram_addr|reg_out[1] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[1] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[1] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[1] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[1] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[1] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[20] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [20]),
	.C(\rv32.mem_ahb_hwdata[20] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[19]~73 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [20]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[20]~74_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[20]~75 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [20]));
defparam \macro_inst|u_reg_sram_addr|reg_out[20] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[20] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[20] .coord_z = 4;
defparam \macro_inst|u_reg_sram_addr|reg_out[20] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[20] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[20] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[20] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[20] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[20] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[21] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [21]),
	.C(\rv32.mem_ahb_hwdata[21] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[20]~75 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [21]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[21]~76_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[21]~77 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [21]));
defparam \macro_inst|u_reg_sram_addr|reg_out[21] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[21] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[21] .coord_z = 5;
defparam \macro_inst|u_reg_sram_addr|reg_out[21] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[21] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[21] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[21] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[21] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[21] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[22] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [22]),
	.C(\rv32.mem_ahb_hwdata[22] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[21]~77 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [22]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[22]~78_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[22]~79 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [22]));
defparam \macro_inst|u_reg_sram_addr|reg_out[22] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[22] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[22] .coord_z = 6;
defparam \macro_inst|u_reg_sram_addr|reg_out[22] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[22] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[22] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[22] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[22] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[22] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[23] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [23]),
	.C(\rv32.mem_ahb_hwdata[23] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[22]~79 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [23]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[23]~80_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[23]~81 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [23]));
defparam \macro_inst|u_reg_sram_addr|reg_out[23] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[23] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[23] .coord_z = 7;
defparam \macro_inst|u_reg_sram_addr|reg_out[23] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[23] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[23] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[23] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[23] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[23] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[23]~35 (
	.A(\macro_inst|ahb2apb_inst|pwrite~q ),
	.B(\macro_inst|u_reg_sram_addr|always0~0_combout ),
	.C(\macro_inst|ahb2apb_inst|penable~q ),
	.D(\macro_inst|u_reg_sram_addr|reg_out[23]~34_combout ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[23]~35_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_reg_sram_addr|reg_out[23]~35 .coord_x = 18;
defparam \macro_inst|u_reg_sram_addr|reg_out[23]~35 .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[23]~35 .coord_z = 11;
defparam \macro_inst|u_reg_sram_addr|reg_out[23]~35 .mask = 16'h80B3;
defparam \macro_inst|u_reg_sram_addr|reg_out[23]~35 .modeMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[23]~35 .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[23]~35 .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[23]~35 .BypassEn = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[23]~35 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[24] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [24]),
	.C(\rv32.mem_ahb_hwdata[24] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[23]~81 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [24]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[24]~82_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[24]~83 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [24]));
defparam \macro_inst|u_reg_sram_addr|reg_out[24] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[24] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[24] .coord_z = 8;
defparam \macro_inst|u_reg_sram_addr|reg_out[24] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[24] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[24] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[24] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[24] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[24] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[25] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [25]),
	.C(\rv32.mem_ahb_hwdata[25] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[24]~83 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [25]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[25]~84_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[25]~85 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [25]));
defparam \macro_inst|u_reg_sram_addr|reg_out[25] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[25] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[25] .coord_z = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[25] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[25] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[25] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[25] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[25] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[25] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[26] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [26]),
	.C(\rv32.mem_ahb_hwdata[26] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[25]~85 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [26]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[26]~86_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[26]~87 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [26]));
defparam \macro_inst|u_reg_sram_addr|reg_out[26] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[26] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[26] .coord_z = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[26] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[26] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[26] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[26] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[26] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[26] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[27] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [27]),
	.C(\rv32.mem_ahb_hwdata[27] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[26]~87 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [27]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[27]~88_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[27]~89 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [27]));
defparam \macro_inst|u_reg_sram_addr|reg_out[27] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[27] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[27] .coord_z = 11;
defparam \macro_inst|u_reg_sram_addr|reg_out[27] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[27] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[27] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[27] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[27] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[27] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[28] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [28]),
	.C(\rv32.mem_ahb_hwdata[28] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[27]~89 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [28]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[28]~90_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[28]~91 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [28]));
defparam \macro_inst|u_reg_sram_addr|reg_out[28] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[28] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[28] .coord_z = 12;
defparam \macro_inst|u_reg_sram_addr|reg_out[28] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[28] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[28] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[28] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[28] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[28] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[29] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [29]),
	.C(\rv32.mem_ahb_hwdata[29] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[28]~91 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [29]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[29]~92_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[29]~93 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [29]));
defparam \macro_inst|u_reg_sram_addr|reg_out[29] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[29] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[29] .coord_z = 13;
defparam \macro_inst|u_reg_sram_addr|reg_out[29] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[29] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[29] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[29] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[29] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[29] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[2] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [2]),
	.C(\rv32.mem_ahb_hwdata[2] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[1]~37 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [2]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[2]~38_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[2]~39 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [2]));
defparam \macro_inst|u_reg_sram_addr|reg_out[2] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[2] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[2] .coord_z = 2;
defparam \macro_inst|u_reg_sram_addr|reg_out[2] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[2] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[2] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[2] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[2] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[2] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[30] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [30]),
	.C(\rv32.mem_ahb_hwdata[30] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[29]~93 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [30]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[30]~94_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[30]~95 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [30]));
defparam \macro_inst|u_reg_sram_addr|reg_out[30] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[30] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[30] .coord_z = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[30] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[30] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[30] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[30] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[30] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[30] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[31] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [31]),
	.C(\rv32.mem_ahb_hwdata[31] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[30]~95 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [31]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y3_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
	.SyncReset(SyncReset_X59_Y3_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[31]~96_combout ),
	.Cout(),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [31]));
defparam \macro_inst|u_reg_sram_addr|reg_out[31] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[31] .coord_y = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[31] .coord_z = 15;
defparam \macro_inst|u_reg_sram_addr|reg_out[31] .mask = 16'h3C3C;
defparam \macro_inst|u_reg_sram_addr|reg_out[31] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[31] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[31] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[31] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[31] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[3] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [3]),
	.C(\rv32.mem_ahb_hwdata[3] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[2]~39 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [3]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[3]~40_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[3]~41 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [3]));
defparam \macro_inst|u_reg_sram_addr|reg_out[3] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[3] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[3] .coord_z = 3;
defparam \macro_inst|u_reg_sram_addr|reg_out[3] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[3] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[3] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[3] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[3] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[3] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[4] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [4]),
	.C(\rv32.mem_ahb_hwdata[4] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[3]~41 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [4]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[4]~42_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[4]~43 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [4]));
defparam \macro_inst|u_reg_sram_addr|reg_out[4] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[4] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[4] .coord_z = 4;
defparam \macro_inst|u_reg_sram_addr|reg_out[4] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[4] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[4] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[4] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[4] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[4] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[5] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [5]),
	.C(\rv32.mem_ahb_hwdata[5] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[4]~43 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [5]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[5]~44_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[5]~45 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [5]));
defparam \macro_inst|u_reg_sram_addr|reg_out[5] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[5] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[5] .coord_z = 5;
defparam \macro_inst|u_reg_sram_addr|reg_out[5] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[5] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[5] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[5] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[5] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[5] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[6] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [6]),
	.C(\rv32.mem_ahb_hwdata[6] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[5]~45 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [6]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[6]~46_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[6]~47 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [6]));
defparam \macro_inst|u_reg_sram_addr|reg_out[6] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[6] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[6] .coord_z = 6;
defparam \macro_inst|u_reg_sram_addr|reg_out[6] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[6] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[6] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[6] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[6] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[6] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[7] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [7]),
	.C(\rv32.mem_ahb_hwdata[7] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[6]~47 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [7]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[7]~48_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[7]~49 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [7]));
defparam \macro_inst|u_reg_sram_addr|reg_out[7] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[7] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[7] .coord_z = 7;
defparam \macro_inst|u_reg_sram_addr|reg_out[7] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[7] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[7] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[7] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[7] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[7] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[8] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [8]),
	.C(\rv32.mem_ahb_hwdata[8] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[7]~49 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [8]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[8]~50_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[8]~51 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [8]));
defparam \macro_inst|u_reg_sram_addr|reg_out[8] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[8] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[8] .coord_z = 8;
defparam \macro_inst|u_reg_sram_addr|reg_out[8] .mask = 16'hC30C;
defparam \macro_inst|u_reg_sram_addr|reg_out[8] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[8] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[8] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[8] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[8] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_reg_sram_addr|reg_out[9] (
	.A(vcc),
	.B(\macro_inst|u_reg_sram_addr|reg_out [9]),
	.C(\rv32.mem_ahb_hwdata[9] ),
	.D(vcc),
	.Cin(\macro_inst|u_reg_sram_addr|reg_out[8]~51 ),
	.Qin(\macro_inst|u_reg_sram_addr|reg_out [9]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_reg_sram_addr|reg_out[23]~35_combout_X59_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
	.SyncReset(SyncReset_X59_Y4_GND),
	.ShiftData(),
	.SyncLoad(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[9]~52_combout ),
	.Cout(\macro_inst|u_reg_sram_addr|reg_out[9]~53 ),
	.Q(\macro_inst|u_reg_sram_addr|reg_out [9]));
defparam \macro_inst|u_reg_sram_addr|reg_out[9] .coord_x = 14;
defparam \macro_inst|u_reg_sram_addr|reg_out[9] .coord_y = 10;
defparam \macro_inst|u_reg_sram_addr|reg_out[9] .coord_z = 9;
defparam \macro_inst|u_reg_sram_addr|reg_out[9] .mask = 16'h3C3F;
defparam \macro_inst|u_reg_sram_addr|reg_out[9] .modeMux = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[9] .FeedbackMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[9] .ShiftMux = 1'b0;
defparam \macro_inst|u_reg_sram_addr|reg_out[9] .BypassEn = 1'b1;
defparam \macro_inst|u_reg_sram_addr|reg_out[9] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|LessThan0~0 (
	.A(\macro_inst|u_sram|wait_cnt [2]),
	.B(\macro_inst|u_sram|wait_cnt [1]),
	.C(\macro_inst|u_sram|wait_cnt [0]),
	.D(\macro_inst|u_sram|wait_cnt [3]),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|LessThan0~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_sram|LessThan0~0 .coord_x = 17;
defparam \macro_inst|u_sram|LessThan0~0 .coord_y = 11;
defparam \macro_inst|u_sram|LessThan0~0 .coord_z = 6;
defparam \macro_inst|u_sram|LessThan0~0 .mask = 16'h0057;
defparam \macro_inst|u_sram|LessThan0~0 .modeMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~0 .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~0 .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~0 .BypassEn = 1'b0;
defparam \macro_inst|u_sram|LessThan0~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|LessThan0~1 (
	.A(\macro_inst|u_sram|wait_cnt [4]),
	.B(\macro_inst|u_sram|wait_cnt [5]),
	.C(\macro_inst|u_sram|wait_cnt [6]),
	.D(\macro_inst|u_sram|wait_cnt [7]),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|LessThan0~1_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_sram|LessThan0~1 .coord_x = 17;
defparam \macro_inst|u_sram|LessThan0~1 .coord_y = 11;
defparam \macro_inst|u_sram|LessThan0~1 .coord_z = 15;
defparam \macro_inst|u_sram|LessThan0~1 .mask = 16'h0001;
defparam \macro_inst|u_sram|LessThan0~1 .modeMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~1 .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~1 .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~1 .BypassEn = 1'b0;
defparam \macro_inst|u_sram|LessThan0~1 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|LessThan0~2 (
	.A(\macro_inst|u_sram|wait_cnt [10]),
	.B(\macro_inst|u_sram|wait_cnt [8]),
	.C(\macro_inst|u_sram|wait_cnt [9]),
	.D(\macro_inst|u_sram|wait_cnt [11]),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|LessThan0~2_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_sram|LessThan0~2 .coord_x = 17;
defparam \macro_inst|u_sram|LessThan0~2 .coord_y = 11;
defparam \macro_inst|u_sram|LessThan0~2 .coord_z = 10;
defparam \macro_inst|u_sram|LessThan0~2 .mask = 16'h0001;
defparam \macro_inst|u_sram|LessThan0~2 .modeMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~2 .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~2 .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~2 .BypassEn = 1'b0;
defparam \macro_inst|u_sram|LessThan0~2 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|LessThan0~3 (
	.A(\macro_inst|u_sram|wait_cnt [13]),
	.B(\macro_inst|u_sram|wait_cnt [14]),
	.C(\macro_inst|u_sram|wait_cnt [12]),
	.D(\macro_inst|u_sram|wait_cnt [15]),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|LessThan0~3_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_sram|LessThan0~3 .coord_x = 17;
defparam \macro_inst|u_sram|LessThan0~3 .coord_y = 11;
defparam \macro_inst|u_sram|LessThan0~3 .coord_z = 13;
defparam \macro_inst|u_sram|LessThan0~3 .mask = 16'h0001;
defparam \macro_inst|u_sram|LessThan0~3 .modeMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~3 .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~3 .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~3 .BypassEn = 1'b0;
defparam \macro_inst|u_sram|LessThan0~3 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|LessThan0~4 (
	.A(\macro_inst|u_sram|LessThan0~0_combout ),
	.B(\macro_inst|u_sram|LessThan0~1_combout ),
	.C(\macro_inst|u_sram|LessThan0~2_combout ),
	.D(\macro_inst|u_sram|LessThan0~3_combout ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|LessThan0~4_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_sram|LessThan0~4 .coord_x = 17;
defparam \macro_inst|u_sram|LessThan0~4 .coord_y = 11;
defparam \macro_inst|u_sram|LessThan0~4 .coord_z = 0;
defparam \macro_inst|u_sram|LessThan0~4 .mask = 16'h8000;
defparam \macro_inst|u_sram|LessThan0~4 .modeMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~4 .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~4 .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|LessThan0~4 .BypassEn = 1'b0;
defparam \macro_inst|u_sram|LessThan0~4 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|prdata[0] (
	.A(\macro_inst|ahb2apb_inst|paddr [2]),
	.B(\macro_inst|u_reg_sram_addr|reg_out [0]),
	.C(\z80_data[0]~input_o ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_sram|prdata [0]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|prdata[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
	.SyncReset(SyncReset_X60_Y4_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y4_VCC),
	.LutOut(\macro_inst|apb_prdata[0]~35_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|prdata [0]));
defparam \macro_inst|u_sram|prdata[0] .coord_x = 19;
defparam \macro_inst|u_sram|prdata[0] .coord_y = 10;
defparam \macro_inst|u_sram|prdata[0] .coord_z = 4;
defparam \macro_inst|u_sram|prdata[0] .mask = 16'hE4FF;
defparam \macro_inst|u_sram|prdata[0] .modeMux = 1'b0;
defparam \macro_inst|u_sram|prdata[0] .FeedbackMux = 1'b1;
defparam \macro_inst|u_sram|prdata[0] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|prdata[0] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|prdata[0] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|prdata[0]~0 (
	.A(\macro_inst|ahb2apb_inst|paddr [2]),
	.B(\macro_inst|Equal3~0_combout ),
	.C(\macro_inst|ahb2apb_inst|penable~q ),
	.D(\macro_inst|ahb2apb_inst|psel~q ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|prdata[0]~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_sram|prdata[0]~0 .coord_x = 18;
defparam \macro_inst|u_sram|prdata[0]~0 .coord_y = 10;
defparam \macro_inst|u_sram|prdata[0]~0 .coord_z = 7;
defparam \macro_inst|u_sram|prdata[0]~0 .mask = 16'h8000;
defparam \macro_inst|u_sram|prdata[0]~0 .modeMux = 1'b0;
defparam \macro_inst|u_sram|prdata[0]~0 .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|prdata[0]~0 .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|prdata[0]~0 .BypassEn = 1'b0;
defparam \macro_inst|u_sram|prdata[0]~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|prdata[1] (
	.A(\macro_inst|ahb2apb_inst|paddr [2]),
	.B(\macro_inst|u_reg_sram_addr|reg_out [1]),
	.C(\z80_data[1]~input_o ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_sram|prdata [1]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|prdata[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
	.SyncReset(SyncReset_X60_Y4_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y4_VCC),
	.LutOut(\macro_inst|apb_prdata[1]~38_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|prdata [1]));
defparam \macro_inst|u_sram|prdata[1] .coord_x = 19;
defparam \macro_inst|u_sram|prdata[1] .coord_y = 10;
defparam \macro_inst|u_sram|prdata[1] .coord_z = 12;
defparam \macro_inst|u_sram|prdata[1] .mask = 16'hE4FF;
defparam \macro_inst|u_sram|prdata[1] .modeMux = 1'b0;
defparam \macro_inst|u_sram|prdata[1] .FeedbackMux = 1'b1;
defparam \macro_inst|u_sram|prdata[1] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|prdata[1] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|prdata[1] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|prdata[2] (
	.A(\macro_inst|ahb2apb_inst|paddr [2]),
	.B(\macro_inst|u_reg_sram_addr|reg_out [2]),
	.C(\z80_data[2]~input_o ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_sram|prdata [2]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|prdata[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
	.SyncReset(SyncReset_X60_Y4_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y4_VCC),
	.LutOut(\macro_inst|apb_prdata[2]~41_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|prdata [2]));
defparam \macro_inst|u_sram|prdata[2] .coord_x = 19;
defparam \macro_inst|u_sram|prdata[2] .coord_y = 10;
defparam \macro_inst|u_sram|prdata[2] .coord_z = 10;
defparam \macro_inst|u_sram|prdata[2] .mask = 16'hE4FF;
defparam \macro_inst|u_sram|prdata[2] .modeMux = 1'b0;
defparam \macro_inst|u_sram|prdata[2] .FeedbackMux = 1'b1;
defparam \macro_inst|u_sram|prdata[2] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|prdata[2] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|prdata[2] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|prdata[3] (
	.A(\macro_inst|u_reg_sram_addr|reg_out [3]),
	.B(\macro_inst|ahb2apb_inst|paddr [2]),
	.C(\z80_data[3]~input_o ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_sram|prdata [3]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|prdata[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
	.SyncReset(SyncReset_X60_Y4_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y4_VCC),
	.LutOut(\macro_inst|apb_prdata[3]~44_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|prdata [3]));
defparam \macro_inst|u_sram|prdata[3] .coord_x = 19;
defparam \macro_inst|u_sram|prdata[3] .coord_y = 10;
defparam \macro_inst|u_sram|prdata[3] .coord_z = 3;
defparam \macro_inst|u_sram|prdata[3] .mask = 16'hE2FF;
defparam \macro_inst|u_sram|prdata[3] .modeMux = 1'b0;
defparam \macro_inst|u_sram|prdata[3] .FeedbackMux = 1'b1;
defparam \macro_inst|u_sram|prdata[3] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|prdata[3] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|prdata[3] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|prdata[4] (
	.A(\macro_inst|ahb2apb_inst|paddr [2]),
	.B(\macro_inst|u_reg_sram_addr|reg_out [4]),
	.C(\z80_data[4]~input_o ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_sram|prdata [4]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|prdata[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
	.SyncReset(SyncReset_X60_Y4_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y4_VCC),
	.LutOut(\macro_inst|apb_prdata[4]~46_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|prdata [4]));
defparam \macro_inst|u_sram|prdata[4] .coord_x = 19;
defparam \macro_inst|u_sram|prdata[4] .coord_y = 10;
defparam \macro_inst|u_sram|prdata[4] .coord_z = 1;
defparam \macro_inst|u_sram|prdata[4] .mask = 16'hE400;
defparam \macro_inst|u_sram|prdata[4] .modeMux = 1'b0;
defparam \macro_inst|u_sram|prdata[4] .FeedbackMux = 1'b1;
defparam \macro_inst|u_sram|prdata[4] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|prdata[4] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|prdata[4] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|prdata[5] (
	.A(\macro_inst|ahb2apb_inst|paddr [2]),
	.B(\macro_inst|Equal3~0_combout ),
	.C(\z80_data[5]~input_o ),
	.D(\macro_inst|u_reg_sram_addr|reg_out [5]),
	.Cin(),
	.Qin(\macro_inst|u_sram|prdata [5]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|prdata[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
	.SyncReset(SyncReset_X60_Y4_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y4_VCC),
	.LutOut(\macro_inst|apb_prdata[5]~50_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|prdata [5]));
defparam \macro_inst|u_sram|prdata[5] .coord_x = 19;
defparam \macro_inst|u_sram|prdata[5] .coord_y = 10;
defparam \macro_inst|u_sram|prdata[5] .coord_z = 6;
defparam \macro_inst|u_sram|prdata[5] .mask = 16'hF7B3;
defparam \macro_inst|u_sram|prdata[5] .modeMux = 1'b0;
defparam \macro_inst|u_sram|prdata[5] .FeedbackMux = 1'b1;
defparam \macro_inst|u_sram|prdata[5] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|prdata[5] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|prdata[5] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|prdata[6] (
	.A(\macro_inst|ahb2apb_inst|paddr [2]),
	.B(\macro_inst|u_reg_sram_addr|reg_out [6]),
	.C(\z80_data[6]~input_o ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_sram|prdata [6]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|prdata[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
	.SyncReset(SyncReset_X60_Y4_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y4_VCC),
	.LutOut(\macro_inst|apb_prdata[6]~53_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|prdata [6]));
defparam \macro_inst|u_sram|prdata[6] .coord_x = 19;
defparam \macro_inst|u_sram|prdata[6] .coord_y = 10;
defparam \macro_inst|u_sram|prdata[6] .coord_z = 5;
defparam \macro_inst|u_sram|prdata[6] .mask = 16'hE4FF;
defparam \macro_inst|u_sram|prdata[6] .modeMux = 1'b0;
defparam \macro_inst|u_sram|prdata[6] .FeedbackMux = 1'b1;
defparam \macro_inst|u_sram|prdata[6] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|prdata[6] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|prdata[6] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|prdata[7] (
	.A(\macro_inst|ahb2apb_inst|paddr [2]),
	.B(\macro_inst|u_reg_sram_addr|reg_out [7]),
	.C(\z80_data[7]~input_o ),
	.D(\macro_inst|Equal3~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_sram|prdata [7]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|prdata[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
	.SyncReset(SyncReset_X60_Y4_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y4_VCC),
	.LutOut(\macro_inst|apb_prdata[7]~56_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|prdata [7]));
defparam \macro_inst|u_sram|prdata[7] .coord_x = 19;
defparam \macro_inst|u_sram|prdata[7] .coord_y = 10;
defparam \macro_inst|u_sram|prdata[7] .coord_z = 0;
defparam \macro_inst|u_sram|prdata[7] .mask = 16'hE4FF;
defparam \macro_inst|u_sram|prdata[7] .modeMux = 1'b0;
defparam \macro_inst|u_sram|prdata[7] .FeedbackMux = 1'b1;
defparam \macro_inst|u_sram|prdata[7] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|prdata[7] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|prdata[7] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|pready (
	.A(\macro_inst|u_sram|LessThan0~4_combout ),
	.B(\macro_inst|Equal4~0_combout ),
	.C(\macro_inst|ahb2apb_inst|penable~q ),
	.D(\macro_inst|ahb2apb_inst|psel~q ),
	.Cin(),
	.Qin(\macro_inst|u_sram|pready~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|pready~0_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|pready~q ));
defparam \macro_inst|u_sram|pready .coord_x = 18;
defparam \macro_inst|u_sram|pready .coord_y = 12;
defparam \macro_inst|u_sram|pready .coord_z = 5;
defparam \macro_inst|u_sram|pready .mask = 16'h8C00;
defparam \macro_inst|u_sram|pready .modeMux = 1'b0;
defparam \macro_inst|u_sram|pready .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|pready .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|pready .BypassEn = 1'b0;
defparam \macro_inst|u_sram|pready .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|pready_shift[0] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_sram|pready~q ),
	.Cin(),
	.Qin(\macro_inst|u_sram|pready_shift [0]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|pready_shift[0]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|pready_shift [0]));
defparam \macro_inst|u_sram|pready_shift[0] .coord_x = 18;
defparam \macro_inst|u_sram|pready_shift[0] .coord_y = 12;
defparam \macro_inst|u_sram|pready_shift[0] .coord_z = 6;
defparam \macro_inst|u_sram|pready_shift[0] .mask = 16'hFF00;
defparam \macro_inst|u_sram|pready_shift[0] .modeMux = 1'b0;
defparam \macro_inst|u_sram|pready_shift[0] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|pready_shift[0] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|pready_shift[0] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|pready_shift[0] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|pready_shift[1] (
	.A(\macro_inst|u_sram|pready_shift [0]),
	.B(vcc),
	.C(\macro_inst|u_sram|pready_shift [0]),
	.D(vcc),
	.Cin(),
	.Qin(\macro_inst|u_sram|pready_shift [1]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y2_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
	.SyncReset(SyncReset_X61_Y2_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X61_Y2_VCC),
	.LutOut(\macro_inst|u_reg_sram_addr|reg_out[23]~34_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|pready_shift [1]));
defparam \macro_inst|u_sram|pready_shift[1] .coord_x = 18;
defparam \macro_inst|u_sram|pready_shift[1] .coord_y = 12;
defparam \macro_inst|u_sram|pready_shift[1] .coord_z = 15;
defparam \macro_inst|u_sram|pready_shift[1] .mask = 16'hAFAF;
defparam \macro_inst|u_sram|pready_shift[1] .modeMux = 1'b0;
defparam \macro_inst|u_sram|pready_shift[1] .FeedbackMux = 1'b1;
defparam \macro_inst|u_sram|pready_shift[1] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|pready_shift[1] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|pready_shift[1] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[0] (
	.A(),
	.B(),
	.C(\macro_inst|u_reg_sram_addr|reg_out [0]),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [0]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(AsyncReset_X60_Y4_GND),
	.SyncReset(SyncReset_X60_Y4_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y4_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [0]));
defparam \macro_inst|u_sram|sram_addr[0] .coord_x = 19;
defparam \macro_inst|u_sram|sram_addr[0] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[0] .coord_z = 9;
defparam \macro_inst|u_sram|sram_addr[0] .mask = 16'hFFFF;
defparam \macro_inst|u_sram|sram_addr[0] .modeMux = 1'b1;
defparam \macro_inst|u_sram|sram_addr[0] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[0] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[0] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|sram_addr[0] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[0]~0 (
	.A(\macro_inst|ahb2apb_inst|penable~q ),
	.B(\macro_inst|ahb2apb_inst|psel~q ),
	.C(\macro_inst|Equal3~0_combout ),
	.D(\macro_inst|ahb2apb_inst|paddr [2]),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[0]~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_sram|sram_addr[0]~0 .coord_x = 15;
defparam \macro_inst|u_sram|sram_addr[0]~0 .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[0]~0 .coord_z = 9;
defparam \macro_inst|u_sram|sram_addr[0]~0 .mask = 16'h4000;
defparam \macro_inst|u_sram|sram_addr[0]~0 .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[0]~0 .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[0]~0 .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[0]~0 .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[0]~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[0]~1 (
	.A(vcc),
	.B(vcc),
	.C(\sys_resetn~clkctrl_outclk ),
	.D(\macro_inst|u_sram|sram_addr[0]~0_combout ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[0]~1_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_sram|sram_addr[0]~1 .coord_x = 15;
defparam \macro_inst|u_sram|sram_addr[0]~1 .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[0]~1 .coord_z = 8;
defparam \macro_inst|u_sram|sram_addr[0]~1 .mask = 16'h0F00;
defparam \macro_inst|u_sram|sram_addr[0]~1 .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[0]~1 .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[0]~1 .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[0]~1 .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[0]~1 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[10] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [10]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [10]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X56_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X56_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[10]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [10]));
defparam \macro_inst|u_sram|sram_addr[10] .coord_x = 15;
defparam \macro_inst|u_sram|sram_addr[10] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[10] .coord_z = 10;
defparam \macro_inst|u_sram|sram_addr[10] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[10] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[10] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[10] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[10] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[10] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[11] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [11]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [11]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X56_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X56_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[11]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [11]));
defparam \macro_inst|u_sram|sram_addr[11] .coord_x = 15;
defparam \macro_inst|u_sram|sram_addr[11] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[11] .coord_z = 4;
defparam \macro_inst|u_sram|sram_addr[11] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[11] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[11] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[11] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[11] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[11] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[12] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [12]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [12]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X56_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X56_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[12]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [12]));
defparam \macro_inst|u_sram|sram_addr[12] .coord_x = 15;
defparam \macro_inst|u_sram|sram_addr[12] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[12] .coord_z = 2;
defparam \macro_inst|u_sram|sram_addr[12] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[12] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[12] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[12] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[12] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[12] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[13] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [13]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [13]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X56_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X56_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[13]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [13]));
defparam \macro_inst|u_sram|sram_addr[13] .coord_x = 15;
defparam \macro_inst|u_sram|sram_addr[13] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[13] .coord_z = 6;
defparam \macro_inst|u_sram|sram_addr[13] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[13] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[13] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[13] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[13] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[13] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[14] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [14]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [14]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X56_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X56_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[14]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [14]));
defparam \macro_inst|u_sram|sram_addr[14] .coord_x = 15;
defparam \macro_inst|u_sram|sram_addr[14] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[14] .coord_z = 15;
defparam \macro_inst|u_sram|sram_addr[14] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[14] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[14] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[14] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[14] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[14] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[15] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [15]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [15]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X60_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[15]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [15]));
defparam \macro_inst|u_sram|sram_addr[15] .coord_x = 14;
defparam \macro_inst|u_sram|sram_addr[15] .coord_y = 8;
defparam \macro_inst|u_sram|sram_addr[15] .coord_z = 4;
defparam \macro_inst|u_sram|sram_addr[15] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[15] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[15] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[15] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[15] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[15] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[1] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [1]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [1]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(AsyncReset_X60_Y4_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[1]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [1]));
defparam \macro_inst|u_sram|sram_addr[1] .coord_x = 19;
defparam \macro_inst|u_sram|sram_addr[1] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[1] .coord_z = 7;
defparam \macro_inst|u_sram|sram_addr[1] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[1] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[1] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[1] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[1] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[1] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[2] (
	.A(),
	.B(),
	.C(\macro_inst|u_reg_sram_addr|reg_out [2]),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [2]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(AsyncReset_X60_Y4_GND),
	.SyncReset(SyncReset_X60_Y4_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y4_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [2]));
defparam \macro_inst|u_sram|sram_addr[2] .coord_x = 19;
defparam \macro_inst|u_sram|sram_addr[2] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[2] .coord_z = 13;
defparam \macro_inst|u_sram|sram_addr[2] .mask = 16'hFFFF;
defparam \macro_inst|u_sram|sram_addr[2] .modeMux = 1'b1;
defparam \macro_inst|u_sram|sram_addr[2] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[2] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[2] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|sram_addr[2] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[3] (
	.A(),
	.B(),
	.C(\macro_inst|u_reg_sram_addr|reg_out [3]),
	.D(),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [3]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(AsyncReset_X60_Y4_GND),
	.SyncReset(SyncReset_X60_Y4_GND),
	.ShiftData(),
	.SyncLoad(SyncLoad_X60_Y4_VCC),
	.LutOut(),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [3]));
defparam \macro_inst|u_sram|sram_addr[3] .coord_x = 19;
defparam \macro_inst|u_sram|sram_addr[3] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[3] .coord_z = 14;
defparam \macro_inst|u_sram|sram_addr[3] .mask = 16'hFFFF;
defparam \macro_inst|u_sram|sram_addr[3] .modeMux = 1'b1;
defparam \macro_inst|u_sram|sram_addr[3] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[3] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[3] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|sram_addr[3] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[4] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [4]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [4]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(AsyncReset_X60_Y4_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[4]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [4]));
defparam \macro_inst|u_sram|sram_addr[4] .coord_x = 19;
defparam \macro_inst|u_sram|sram_addr[4] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[4] .coord_z = 2;
defparam \macro_inst|u_sram|sram_addr[4] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[4] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[4] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[4] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[4] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[4] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[5] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [5]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [5]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(AsyncReset_X60_Y4_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[5]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [5]));
defparam \macro_inst|u_sram|sram_addr[5] .coord_x = 19;
defparam \macro_inst|u_sram|sram_addr[5] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[5] .coord_z = 8;
defparam \macro_inst|u_sram|sram_addr[5] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[5] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[5] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[5] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[5] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[5] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[6] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [6]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [6]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(AsyncReset_X60_Y4_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[6]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [6]));
defparam \macro_inst|u_sram|sram_addr[6] .coord_x = 19;
defparam \macro_inst|u_sram|sram_addr[6] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[6] .coord_z = 11;
defparam \macro_inst|u_sram|sram_addr[6] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[6] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[6] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[6] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[6] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[6] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[7] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [7]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [7]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X60_Y4_SIG_SIG ),
	.AsyncReset(AsyncReset_X60_Y4_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[7]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [7]));
defparam \macro_inst|u_sram|sram_addr[7] .coord_x = 19;
defparam \macro_inst|u_sram|sram_addr[7] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[7] .coord_z = 15;
defparam \macro_inst|u_sram|sram_addr[7] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[7] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[7] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[7] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[7] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[7] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[8] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [8]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [8]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X56_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X56_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[8]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [8]));
defparam \macro_inst|u_sram|sram_addr[8] .coord_x = 15;
defparam \macro_inst|u_sram|sram_addr[8] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[8] .coord_z = 14;
defparam \macro_inst|u_sram|sram_addr[8] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[8] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[8] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[8] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[8] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[8] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_addr[9] (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_reg_sram_addr|reg_out [9]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_addr [9]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_addr[0]~1_combout_X56_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X56_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_addr[9]~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_addr [9]));
defparam \macro_inst|u_sram|sram_addr[9] .coord_x = 15;
defparam \macro_inst|u_sram|sram_addr[9] .coord_y = 10;
defparam \macro_inst|u_sram|sram_addr[9] .coord_z = 12;
defparam \macro_inst|u_sram|sram_addr[9] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_addr[9] .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[9] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[9] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_addr[9] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_addr[9] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_cs_n (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(\macro_inst|u_sram|sram_addr[0]~0_combout ),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_cs_n~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_cs_n~0_combout_X56_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_cs_n~feeder_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_cs_n~q ));
defparam \macro_inst|u_sram|sram_cs_n .coord_x = 15;
defparam \macro_inst|u_sram|sram_cs_n .coord_y = 10;
defparam \macro_inst|u_sram|sram_cs_n .coord_z = 11;
defparam \macro_inst|u_sram|sram_cs_n .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_cs_n .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_cs_n .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_cs_n .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_cs_n .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_cs_n .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_cs_n~0 (
	.A(\macro_inst|ahb2apb_inst|penable~q ),
	.B(\macro_inst|u_sram|LessThan0~4_combout ),
	.C(\macro_inst|Equal4~0_combout ),
	.D(\macro_inst|ahb2apb_inst|psel~q ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_cs_n~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_sram|sram_cs_n~0 .coord_x = 18;
defparam \macro_inst|u_sram|sram_cs_n~0 .coord_y = 10;
defparam \macro_inst|u_sram|sram_cs_n~0 .coord_z = 4;
defparam \macro_inst|u_sram|sram_cs_n~0 .mask = 16'h7FFF;
defparam \macro_inst|u_sram|sram_cs_n~0 .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_cs_n~0 .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_cs_n~0 .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_cs_n~0 .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_cs_n~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_oe_n (
	.A(vcc),
	.B(\macro_inst|u_sram|sram_addr[0]~0_combout ),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|pwrite~q ),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_oe_n~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_cs_n~0_combout_X56_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_oe_n~0_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_oe_n~q ));
defparam \macro_inst|u_sram|sram_oe_n .coord_x = 15;
defparam \macro_inst|u_sram|sram_oe_n .coord_y = 10;
defparam \macro_inst|u_sram|sram_oe_n .coord_z = 0;
defparam \macro_inst|u_sram|sram_oe_n .mask = 16'h00CC;
defparam \macro_inst|u_sram|sram_oe_n .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_oe_n .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_oe_n .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_oe_n .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_oe_n .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_out[0] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[0] ),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_out [0]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_out[0]~0_combout_X57_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X57_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_out[0]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_out [0]));
defparam \macro_inst|u_sram|sram_out[0] .coord_x = 20;
defparam \macro_inst|u_sram|sram_out[0] .coord_y = 10;
defparam \macro_inst|u_sram|sram_out[0] .coord_z = 10;
defparam \macro_inst|u_sram|sram_out[0] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_out[0] .modeMux = 1'b1;
defparam \macro_inst|u_sram|sram_out[0] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[0] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[0] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_out[0] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_out[0]~0 (
	.A(vcc),
	.B(\macro_inst|u_sram|sram_addr[0]~0_combout ),
	.C(\sys_resetn~clkctrl_outclk ),
	.D(\macro_inst|ahb2apb_inst|pwrite~q ),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_out[0]~0_combout ),
	.Cout(),
	.Q());
defparam \macro_inst|u_sram|sram_out[0]~0 .coord_x = 15;
defparam \macro_inst|u_sram|sram_out[0]~0 .coord_y = 10;
defparam \macro_inst|u_sram|sram_out[0]~0 .coord_z = 5;
defparam \macro_inst|u_sram|sram_out[0]~0 .mask = 16'h0C00;
defparam \macro_inst|u_sram|sram_out[0]~0 .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[0]~0 .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[0]~0 .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[0]~0 .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_out[0]~0 .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_out[1] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[1] ),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_out [1]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_out[0]~0_combout_X57_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X57_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_out[1]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_out [1]));
defparam \macro_inst|u_sram|sram_out[1] .coord_x = 20;
defparam \macro_inst|u_sram|sram_out[1] .coord_y = 10;
defparam \macro_inst|u_sram|sram_out[1] .coord_z = 1;
defparam \macro_inst|u_sram|sram_out[1] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_out[1] .modeMux = 1'b1;
defparam \macro_inst|u_sram|sram_out[1] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[1] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[1] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_out[1] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_out[2] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[2] ),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_out [2]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_out[0]~0_combout_X57_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X57_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_out[2]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_out [2]));
defparam \macro_inst|u_sram|sram_out[2] .coord_x = 20;
defparam \macro_inst|u_sram|sram_out[2] .coord_y = 10;
defparam \macro_inst|u_sram|sram_out[2] .coord_z = 11;
defparam \macro_inst|u_sram|sram_out[2] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_out[2] .modeMux = 1'b1;
defparam \macro_inst|u_sram|sram_out[2] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[2] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[2] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_out[2] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_out[3] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[3] ),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_out [3]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_out[0]~0_combout_X57_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X57_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_out[3]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_out [3]));
defparam \macro_inst|u_sram|sram_out[3] .coord_x = 20;
defparam \macro_inst|u_sram|sram_out[3] .coord_y = 10;
defparam \macro_inst|u_sram|sram_out[3] .coord_z = 3;
defparam \macro_inst|u_sram|sram_out[3] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_out[3] .modeMux = 1'b1;
defparam \macro_inst|u_sram|sram_out[3] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[3] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[3] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_out[3] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_out[4] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[4] ),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_out [4]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_out[0]~0_combout_X57_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X57_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_out[4]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_out [4]));
defparam \macro_inst|u_sram|sram_out[4] .coord_x = 20;
defparam \macro_inst|u_sram|sram_out[4] .coord_y = 10;
defparam \macro_inst|u_sram|sram_out[4] .coord_z = 8;
defparam \macro_inst|u_sram|sram_out[4] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_out[4] .modeMux = 1'b1;
defparam \macro_inst|u_sram|sram_out[4] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[4] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[4] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_out[4] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_out[5] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[5] ),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_out [5]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_out[0]~0_combout_X57_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X57_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_out[5]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_out [5]));
defparam \macro_inst|u_sram|sram_out[5] .coord_x = 20;
defparam \macro_inst|u_sram|sram_out[5] .coord_y = 10;
defparam \macro_inst|u_sram|sram_out[5] .coord_z = 6;
defparam \macro_inst|u_sram|sram_out[5] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_out[5] .modeMux = 1'b1;
defparam \macro_inst|u_sram|sram_out[5] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[5] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[5] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_out[5] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_out[6] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[6] ),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_out [6]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_out[0]~0_combout_X57_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X57_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_out[6]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_out [6]));
defparam \macro_inst|u_sram|sram_out[6] .coord_x = 20;
defparam \macro_inst|u_sram|sram_out[6] .coord_y = 10;
defparam \macro_inst|u_sram|sram_out[6] .coord_z = 15;
defparam \macro_inst|u_sram|sram_out[6] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_out[6] .modeMux = 1'b1;
defparam \macro_inst|u_sram|sram_out[6] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[6] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[6] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_out[6] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_out[7] (
	.A(),
	.B(),
	.C(vcc),
	.D(\rv32.mem_ahb_hwdata[7] ),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_out [7]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_out[0]~0_combout_X57_Y1_SIG_SIG ),
	.AsyncReset(AsyncReset_X57_Y1_GND),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_out[7]__feeder__LutOut ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_out [7]));
defparam \macro_inst|u_sram|sram_out[7] .coord_x = 20;
defparam \macro_inst|u_sram|sram_out[7] .coord_y = 10;
defparam \macro_inst|u_sram|sram_out[7] .coord_z = 5;
defparam \macro_inst|u_sram|sram_out[7] .mask = 16'hFF00;
defparam \macro_inst|u_sram|sram_out[7] .modeMux = 1'b1;
defparam \macro_inst|u_sram|sram_out[7] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[7] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_out[7] .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_out[7] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_out_oe (
	.A(\macro_inst|Equal3~0_combout ),
	.B(\macro_inst|ahb2apb_inst|psel~q ),
	.C(\macro_inst|ahb2apb_inst|pwrite~q ),
	.D(\macro_inst|ahb2apb_inst|paddr [2]),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_out_oe~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_cs_n~0_combout_X56_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
	.SyncReset(\macro_inst|ahb2apb_inst|penable~q__SyncReset_X56_Y1_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X56_Y1_GND),
	.LutOut(\macro_inst|u_sram|sram_out_oe~0_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_out_oe~q ));
defparam \macro_inst|u_sram|sram_out_oe .coord_x = 15;
defparam \macro_inst|u_sram|sram_out_oe .coord_y = 10;
defparam \macro_inst|u_sram|sram_out_oe .coord_z = 3;
defparam \macro_inst|u_sram|sram_out_oe .mask = 16'h8000;
defparam \macro_inst|u_sram|sram_out_oe .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_out_oe .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_out_oe .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_out_oe .BypassEn = 1'b1;
defparam \macro_inst|u_sram|sram_out_oe .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|sram_we_n (
	.A(vcc),
	.B(\macro_inst|u_sram|sram_addr[0]~0_combout ),
	.C(vcc),
	.D(\macro_inst|ahb2apb_inst|pwrite~q ),
	.Cin(),
	.Qin(\macro_inst|u_sram|sram_we_n~q ),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_sram|sram_cs_n~0_combout_X56_Y1_SIG_SIG ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\macro_inst|u_sram|sram_out[0]~1_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|sram_we_n~q ));
defparam \macro_inst|u_sram|sram_we_n .coord_x = 15;
defparam \macro_inst|u_sram|sram_we_n .coord_y = 10;
defparam \macro_inst|u_sram|sram_we_n .coord_z = 13;
defparam \macro_inst|u_sram|sram_we_n .mask = 16'hCC00;
defparam \macro_inst|u_sram|sram_we_n .modeMux = 1'b0;
defparam \macro_inst|u_sram|sram_we_n .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|sram_we_n .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|sram_we_n .BypassEn = 1'b0;
defparam \macro_inst|u_sram|sram_we_n .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|wait_cnt[0] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [0]),
	.C(vcc),
	.D(vcc),
	.Cin(),
	.Qin(\macro_inst|u_sram|wait_cnt [0]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[0]~16_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[0]~17 ),
	.Q(\macro_inst|u_sram|wait_cnt [0]));
defparam \macro_inst|u_sram|wait_cnt[0] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[0] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[0] .coord_z = 0;
defparam \macro_inst|u_sram|wait_cnt[0] .mask = 16'h33CC;
defparam \macro_inst|u_sram|wait_cnt[0] .modeMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[0] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[0] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[0] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[0] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[10] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [10]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[9]~35 ),
	.Qin(\macro_inst|u_sram|wait_cnt [10]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[10]~36_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[10]~37 ),
	.Q(\macro_inst|u_sram|wait_cnt [10]));
defparam \macro_inst|u_sram|wait_cnt[10] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[10] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[10] .coord_z = 10;
defparam \macro_inst|u_sram|wait_cnt[10] .mask = 16'hC30C;
defparam \macro_inst|u_sram|wait_cnt[10] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[10] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[10] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[10] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[10] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[11] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [11]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[10]~37 ),
	.Qin(\macro_inst|u_sram|wait_cnt [11]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[11]~38_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[11]~39 ),
	.Q(\macro_inst|u_sram|wait_cnt [11]));
defparam \macro_inst|u_sram|wait_cnt[11] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[11] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[11] .coord_z = 11;
defparam \macro_inst|u_sram|wait_cnt[11] .mask = 16'h3C3F;
defparam \macro_inst|u_sram|wait_cnt[11] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[11] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[11] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[11] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[11] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[12] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [12]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[11]~39 ),
	.Qin(\macro_inst|u_sram|wait_cnt [12]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[12]~40_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[12]~41 ),
	.Q(\macro_inst|u_sram|wait_cnt [12]));
defparam \macro_inst|u_sram|wait_cnt[12] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[12] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[12] .coord_z = 12;
defparam \macro_inst|u_sram|wait_cnt[12] .mask = 16'hC30C;
defparam \macro_inst|u_sram|wait_cnt[12] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[12] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[12] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[12] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[12] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[13] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [13]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[12]~41 ),
	.Qin(\macro_inst|u_sram|wait_cnt [13]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[13]~42_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[13]~43 ),
	.Q(\macro_inst|u_sram|wait_cnt [13]));
defparam \macro_inst|u_sram|wait_cnt[13] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[13] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[13] .coord_z = 13;
defparam \macro_inst|u_sram|wait_cnt[13] .mask = 16'h3C3F;
defparam \macro_inst|u_sram|wait_cnt[13] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[13] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[13] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[13] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[13] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[14] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [14]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[13]~43 ),
	.Qin(\macro_inst|u_sram|wait_cnt [14]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[14]~44_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[14]~45 ),
	.Q(\macro_inst|u_sram|wait_cnt [14]));
defparam \macro_inst|u_sram|wait_cnt[14] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[14] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[14] .coord_z = 14;
defparam \macro_inst|u_sram|wait_cnt[14] .mask = 16'hC30C;
defparam \macro_inst|u_sram|wait_cnt[14] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[14] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[14] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[14] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[14] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[15] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [15]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[14]~45 ),
	.Qin(\macro_inst|u_sram|wait_cnt [15]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[15]~46_combout ),
	.Cout(),
	.Q(\macro_inst|u_sram|wait_cnt [15]));
defparam \macro_inst|u_sram|wait_cnt[15] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[15] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[15] .coord_z = 15;
defparam \macro_inst|u_sram|wait_cnt[15] .mask = 16'h3C3C;
defparam \macro_inst|u_sram|wait_cnt[15] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[15] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[15] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[15] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[15] .CarryEnb = 1'b1;

alta_slice \macro_inst|u_sram|wait_cnt[1] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [1]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[0]~17 ),
	.Qin(\macro_inst|u_sram|wait_cnt [1]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[1]~18_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[1]~19 ),
	.Q(\macro_inst|u_sram|wait_cnt [1]));
defparam \macro_inst|u_sram|wait_cnt[1] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[1] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[1] .coord_z = 1;
defparam \macro_inst|u_sram|wait_cnt[1] .mask = 16'h3C3F;
defparam \macro_inst|u_sram|wait_cnt[1] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[1] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[1] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[1] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[1] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[2] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [2]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[1]~19 ),
	.Qin(\macro_inst|u_sram|wait_cnt [2]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[2]~20_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[2]~21 ),
	.Q(\macro_inst|u_sram|wait_cnt [2]));
defparam \macro_inst|u_sram|wait_cnt[2] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[2] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[2] .coord_z = 2;
defparam \macro_inst|u_sram|wait_cnt[2] .mask = 16'hC30C;
defparam \macro_inst|u_sram|wait_cnt[2] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[2] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[2] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[2] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[2] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[3] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [3]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[2]~21 ),
	.Qin(\macro_inst|u_sram|wait_cnt [3]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[3]~22_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[3]~23 ),
	.Q(\macro_inst|u_sram|wait_cnt [3]));
defparam \macro_inst|u_sram|wait_cnt[3] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[3] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[3] .coord_z = 3;
defparam \macro_inst|u_sram|wait_cnt[3] .mask = 16'h3C3F;
defparam \macro_inst|u_sram|wait_cnt[3] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[3] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[3] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[3] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[3] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[4] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [4]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[3]~23 ),
	.Qin(\macro_inst|u_sram|wait_cnt [4]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[4]~24_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[4]~25 ),
	.Q(\macro_inst|u_sram|wait_cnt [4]));
defparam \macro_inst|u_sram|wait_cnt[4] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[4] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[4] .coord_z = 4;
defparam \macro_inst|u_sram|wait_cnt[4] .mask = 16'hC30C;
defparam \macro_inst|u_sram|wait_cnt[4] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[4] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[4] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[4] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[4] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[5] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [5]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[4]~25 ),
	.Qin(\macro_inst|u_sram|wait_cnt [5]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[5]~26_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[5]~27 ),
	.Q(\macro_inst|u_sram|wait_cnt [5]));
defparam \macro_inst|u_sram|wait_cnt[5] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[5] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[5] .coord_z = 5;
defparam \macro_inst|u_sram|wait_cnt[5] .mask = 16'h3C3F;
defparam \macro_inst|u_sram|wait_cnt[5] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[5] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[5] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[5] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[5] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[6] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [6]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[5]~27 ),
	.Qin(\macro_inst|u_sram|wait_cnt [6]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[6]~28_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[6]~29 ),
	.Q(\macro_inst|u_sram|wait_cnt [6]));
defparam \macro_inst|u_sram|wait_cnt[6] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[6] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[6] .coord_z = 6;
defparam \macro_inst|u_sram|wait_cnt[6] .mask = 16'hC30C;
defparam \macro_inst|u_sram|wait_cnt[6] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[6] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[6] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[6] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[6] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[7] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [7]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[6]~29 ),
	.Qin(\macro_inst|u_sram|wait_cnt [7]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[7]~30_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[7]~31 ),
	.Q(\macro_inst|u_sram|wait_cnt [7]));
defparam \macro_inst|u_sram|wait_cnt[7] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[7] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[7] .coord_z = 7;
defparam \macro_inst|u_sram|wait_cnt[7] .mask = 16'h3C3F;
defparam \macro_inst|u_sram|wait_cnt[7] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[7] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[7] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[7] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[7] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[8] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [8]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[7]~31 ),
	.Qin(\macro_inst|u_sram|wait_cnt [8]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[8]~32_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[8]~33 ),
	.Q(\macro_inst|u_sram|wait_cnt [8]));
defparam \macro_inst|u_sram|wait_cnt[8] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[8] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[8] .coord_z = 8;
defparam \macro_inst|u_sram|wait_cnt[8] .mask = 16'hC30C;
defparam \macro_inst|u_sram|wait_cnt[8] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[8] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[8] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[8] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[8] .CarryEnb = 1'b0;

alta_slice \macro_inst|u_sram|wait_cnt[9] (
	.A(vcc),
	.B(\macro_inst|u_sram|wait_cnt [9]),
	.C(vcc),
	.D(vcc),
	.Cin(\macro_inst|u_sram|wait_cnt[8]~33 ),
	.Qin(\macro_inst|u_sram|wait_cnt [9]),
	.Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
	.AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
	.SyncReset(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ),
	.ShiftData(),
	.SyncLoad(SyncLoad_X57_Y4_GND),
	.LutOut(\macro_inst|u_sram|wait_cnt[9]~34_combout ),
	.Cout(\macro_inst|u_sram|wait_cnt[9]~35 ),
	.Q(\macro_inst|u_sram|wait_cnt [9]));
defparam \macro_inst|u_sram|wait_cnt[9] .coord_x = 16;
defparam \macro_inst|u_sram|wait_cnt[9] .coord_y = 11;
defparam \macro_inst|u_sram|wait_cnt[9] .coord_z = 9;
defparam \macro_inst|u_sram|wait_cnt[9] .mask = 16'h3C3F;
defparam \macro_inst|u_sram|wait_cnt[9] .modeMux = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[9] .FeedbackMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[9] .ShiftMux = 1'b0;
defparam \macro_inst|u_sram|wait_cnt[9] .BypassEn = 1'b1;
defparam \macro_inst|u_sram|wait_cnt[9] .CarryEnb = 1'b0;

alta_pllve \pll_inst|auto_generated|pll1 (
	.clkin(\PIN_HSE~input_o ),
	.clkfb(\pll_inst|auto_generated|pll1~FBOUT ),
	.pfden(vcc),
	.resetn(!\PLL_ENABLE~combout ),
	.phasecounterselect({gnd, gnd, gnd}),
	.phaseupdown(gnd),
	.phasestep(gnd),
	.scanclk(gnd),
	.scanclkena(vcc),
	.scandata(gnd),
	.configupdate(gnd),
	.scandataout(),
	.scandone(),
	.phasedone(),
	.clkout0(\pll_inst|auto_generated|pll1_CLK_bus [0]),
	.clkout1(\pll_inst|auto_generated|pll1_CLK_bus [1]),
	.clkout2(\pll_inst|auto_generated|pll1_CLK_bus [2]),
	.clkout3(\pll_inst|auto_generated|pll1_CLK_bus [3]),
	.clkout4(\pll_inst|auto_generated|pll1_CLK_bus [4]),
	.clkfbout(\pll_inst|auto_generated|pll1~FBOUT ),
	.lock(\auto_generated_inst.hbo_13_f13ffbd025d547b8_bp ));
defparam \pll_inst|auto_generated|pll1 .coord_x = 22;
defparam \pll_inst|auto_generated|pll1 .coord_y = 5;
defparam \pll_inst|auto_generated|pll1 .coord_z = 0;
defparam \pll_inst|auto_generated|pll1 .CLKIN_HIGH = 8'b11111111;
defparam \pll_inst|auto_generated|pll1 .CLKIN_LOW = 8'b11111111;
defparam \pll_inst|auto_generated|pll1 .CLKIN_TRIM = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKIN_BYPASS = 1'b1;
defparam \pll_inst|auto_generated|pll1 .CLKFB_HIGH = 8'b00011000;
defparam \pll_inst|auto_generated|pll1 .CLKFB_LOW = 8'b00011000;
defparam \pll_inst|auto_generated|pll1 .CLKFB_TRIM = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKFB_BYPASS = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKDIV0_EN = 1'b1;
defparam \pll_inst|auto_generated|pll1 .CLKDIV1_EN = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKDIV2_EN = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKDIV3_EN = 1'b1;
defparam \pll_inst|auto_generated|pll1 .CLKDIV4_EN = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT0_HIGH = 8'b00000000;
defparam \pll_inst|auto_generated|pll1 .CLKOUT0_LOW = 8'b00000000;
defparam \pll_inst|auto_generated|pll1 .CLKOUT0_TRIM = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT0_BYPASS = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT1_HIGH = 8'b11111111;
defparam \pll_inst|auto_generated|pll1 .CLKOUT1_LOW = 8'b11111111;
defparam \pll_inst|auto_generated|pll1 .CLKOUT1_TRIM = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT1_BYPASS = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT2_HIGH = 8'b11111111;
defparam \pll_inst|auto_generated|pll1 .CLKOUT2_LOW = 8'b11111111;
defparam \pll_inst|auto_generated|pll1 .CLKOUT2_TRIM = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT2_BYPASS = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT3_HIGH = 8'b00000011;
defparam \pll_inst|auto_generated|pll1 .CLKOUT3_LOW = 8'b00000011;
defparam \pll_inst|auto_generated|pll1 .CLKOUT3_TRIM = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT3_BYPASS = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT4_HIGH = 8'b11111111;
defparam \pll_inst|auto_generated|pll1 .CLKOUT4_LOW = 8'b11111111;
defparam \pll_inst|auto_generated|pll1 .CLKOUT4_TRIM = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT4_BYPASS = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT0_DEL = 8'b00000000;
defparam \pll_inst|auto_generated|pll1 .CLKOUT1_DEL = 8'b00000000;
defparam \pll_inst|auto_generated|pll1 .CLKOUT2_DEL = 8'b00000000;
defparam \pll_inst|auto_generated|pll1 .CLKOUT3_DEL = 8'b00000000;
defparam \pll_inst|auto_generated|pll1 .CLKOUT4_DEL = 8'b00000000;
defparam \pll_inst|auto_generated|pll1 .CLKOUT0_PHASE = 3'b000;
defparam \pll_inst|auto_generated|pll1 .CLKOUT1_PHASE = 3'b000;
defparam \pll_inst|auto_generated|pll1 .CLKOUT2_PHASE = 3'b000;
defparam \pll_inst|auto_generated|pll1 .CLKOUT3_PHASE = 3'b000;
defparam \pll_inst|auto_generated|pll1 .CLKOUT4_PHASE = 3'b000;
defparam \pll_inst|auto_generated|pll1 .CLKFB_DEL = 8'b00000000;
defparam \pll_inst|auto_generated|pll1 .CLKFB_PHASE = 3'b000;
defparam \pll_inst|auto_generated|pll1 .FEEDBACK_MODE = 3'b100;
defparam \pll_inst|auto_generated|pll1 .FBDELAY_VAL = 3'b100;
defparam \pll_inst|auto_generated|pll1 .PLLOUTP_EN = 1'b0;
defparam \pll_inst|auto_generated|pll1 .PLLOUTN_EN = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT1_CASCADE = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT2_CASCADE = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT3_CASCADE = 1'b0;
defparam \pll_inst|auto_generated|pll1 .CLKOUT4_CASCADE = 1'b0;
defparam \pll_inst|auto_generated|pll1 .VCO_POST_DIV = 1'b1;
defparam \pll_inst|auto_generated|pll1 .REG_CTRL = 2'b00;
defparam \pll_inst|auto_generated|pll1 .CP = 3'b100;
defparam \pll_inst|auto_generated|pll1 .RREF = 2'b01;
defparam \pll_inst|auto_generated|pll1 .RVI = 2'b01;
defparam \pll_inst|auto_generated|pll1 .IVCO = 3'b010;
defparam \pll_inst|auto_generated|pll1 .PLL_EN_FLAG = 1'b1;

alta_slice \pll_inst|auto_generated|pll_lock_sync (
	.A(vcc),
	.B(vcc),
	.C(vcc),
	.D(vcc),
	.Cin(),
	.Qin(\pll_inst|auto_generated|pll_lock_sync~q ),
	.Clk(\auto_generated_inst.hbo_13_f13ffbd025d547b8_bp_X49_Y1_SIG_VCC ),
	.AsyncReset(\PLL_ENABLE~clkctrl_outclk__AsyncReset_X49_Y1_SIG ),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\pll_inst|auto_generated|pll_lock_sync~feeder_combout ),
	.Cout(),
	.Q(\pll_inst|auto_generated|pll_lock_sync~q ));
defparam \pll_inst|auto_generated|pll_lock_sync .coord_x = 17;
defparam \pll_inst|auto_generated|pll_lock_sync .coord_y = 5;
defparam \pll_inst|auto_generated|pll_lock_sync .coord_z = 5;
defparam \pll_inst|auto_generated|pll_lock_sync .mask = 16'hFFFF;
defparam \pll_inst|auto_generated|pll_lock_sync .modeMux = 1'b0;
defparam \pll_inst|auto_generated|pll_lock_sync .FeedbackMux = 1'b0;
defparam \pll_inst|auto_generated|pll_lock_sync .ShiftMux = 1'b0;
defparam \pll_inst|auto_generated|pll_lock_sync .BypassEn = 1'b0;
defparam \pll_inst|auto_generated|pll_lock_sync .CarryEnb = 1'b1;

alta_rv32 rv32(
	.sys_clk(\gclksw_inst|gclk_switch__alta_gclksw__clkout ),
	.mem_ahb_hready(\rv32.mem_ahb_hready ),
	.mem_ahb_hreadyout(!\macro_inst|ahb2apb_inst|hreadyout~q ),
	.mem_ahb_htrans({\rv32.mem_ahb_htrans[1] , \rv32.mem_ahb_htrans[0] }),
	.mem_ahb_hsize({\rv32.mem_ahb_hsize[2] , \rv32.mem_ahb_hsize[1] , \rv32.mem_ahb_hsize[0] }),
	.mem_ahb_hburst({\rv32.mem_ahb_hburst[2] , \rv32.mem_ahb_hburst[1] , \rv32.mem_ahb_hburst[0] }),
	.mem_ahb_hwrite(\rv32.mem_ahb_hwrite ),
	.mem_ahb_haddr({\rv32.mem_ahb_haddr[31] , \rv32.mem_ahb_haddr[30] , \rv32.mem_ahb_haddr[29] , \rv32.mem_ahb_haddr[28] , \rv32.mem_ahb_haddr[27] , \rv32.mem_ahb_haddr[26] , \rv32.mem_ahb_haddr[25] , \rv32.mem_ahb_haddr[24] , \rv32.mem_ahb_haddr[23] , \rv32.mem_ahb_haddr[22] , \rv32.mem_ahb_haddr[21] , \rv32.mem_ahb_haddr[20] , \rv32.mem_ahb_haddr[19] , \rv32.mem_ahb_haddr[18] , \rv32.mem_ahb_haddr[17] , \rv32.mem_ahb_haddr[16] , \rv32.mem_ahb_haddr[15] , \rv32.mem_ahb_haddr[14] , \rv32.mem_ahb_haddr[13] , \rv32.mem_ahb_haddr[12] , \rv32.mem_ahb_haddr[11] , \rv32.mem_ahb_haddr[10] , \rv32.mem_ahb_haddr[9] , \rv32.mem_ahb_haddr[8] , \rv32.mem_ahb_haddr[7] , \rv32.mem_ahb_haddr[6] , \rv32.mem_ahb_haddr[5] , \rv32.mem_ahb_haddr[4] , \rv32.mem_ahb_haddr[3] , \rv32.mem_ahb_haddr[2] , \rv32.mem_ahb_haddr[1] , \rv32.mem_ahb_haddr[0] }),
	.mem_ahb_hwdata({\rv32.mem_ahb_hwdata[31] , \rv32.mem_ahb_hwdata[30] , \rv32.mem_ahb_hwdata[29] , \rv32.mem_ahb_hwdata[28] , \rv32.mem_ahb_hwdata[27] , \rv32.mem_ahb_hwdata[26] , \rv32.mem_ahb_hwdata[25] , \rv32.mem_ahb_hwdata[24] , \rv32.mem_ahb_hwdata[23] , \rv32.mem_ahb_hwdata[22] , \rv32.mem_ahb_hwdata[21] , \rv32.mem_ahb_hwdata[20] , \rv32.mem_ahb_hwdata[19] , \rv32.mem_ahb_hwdata[18] , \rv32.mem_ahb_hwdata[17] , \rv32.mem_ahb_hwdata[16] , \rv32.mem_ahb_hwdata[15] , \rv32.mem_ahb_hwdata[14] , \rv32.mem_ahb_hwdata[13] , \rv32.mem_ahb_hwdata[12] , \rv32.mem_ahb_hwdata[11] , \rv32.mem_ahb_hwdata[10] , \rv32.mem_ahb_hwdata[9] , \rv32.mem_ahb_hwdata[8] , \rv32.mem_ahb_hwdata[7] , \rv32.mem_ahb_hwdata[6] , \rv32.mem_ahb_hwdata[5] , \rv32.mem_ahb_hwdata[4] , \rv32.mem_ahb_hwdata[3] , \rv32.mem_ahb_hwdata[2] , \rv32.mem_ahb_hwdata[1] , \rv32.mem_ahb_hwdata[0] }),
	.mem_ahb_hresp(\macro_inst|ahb2apb_inst|hresp~q ),
	.mem_ahb_hrdata({\macro_inst|ahb2apb_inst|prdata [31], \macro_inst|ahb2apb_inst|prdata [30], \macro_inst|ahb2apb_inst|prdata [29], \macro_inst|ahb2apb_inst|prdata [28], \macro_inst|ahb2apb_inst|prdata [27], \macro_inst|ahb2apb_inst|prdata [26], \macro_inst|ahb2apb_inst|prdata [25], \macro_inst|ahb2apb_inst|prdata [24], \macro_inst|ahb2apb_inst|prdata [23], \macro_inst|ahb2apb_inst|prdata [22], \macro_inst|ahb2apb_inst|prdata [21], \macro_inst|ahb2apb_inst|prdata [20], \macro_inst|ahb2apb_inst|prdata [19], \macro_inst|ahb2apb_inst|prdata [18], \macro_inst|ahb2apb_inst|prdata [17], \macro_inst|ahb2apb_inst|prdata [16], \macro_inst|ahb2apb_inst|prdata [15], \macro_inst|ahb2apb_inst|prdata [14], \macro_inst|ahb2apb_inst|prdata [13], \macro_inst|ahb2apb_inst|prdata [12], \macro_inst|ahb2apb_inst|prdata [11], \macro_inst|ahb2apb_inst|prdata [10], \macro_inst|ahb2apb_inst|prdata [9], \macro_inst|ahb2apb_inst|prdata [8], \macro_inst|ahb2apb_inst|prdata [7], \macro_inst|ahb2apb_inst|prdata [6], \macro_inst|ahb2apb_inst|prdata [5], \macro_inst|ahb2apb_inst|prdata [4], \macro_inst|ahb2apb_inst|prdata [3], \macro_inst|ahb2apb_inst|prdata [2], \macro_inst|ahb2apb_inst|prdata [1], \macro_inst|ahb2apb_inst|prdata [0]}),
	.slave_ahb_hsel(gnd),
	.slave_ahb_hready(vcc),
	.slave_ahb_hreadyout(\rv32.slave_ahb_hreadyout ),
	.slave_ahb_htrans({gnd, gnd}),
	.slave_ahb_hsize({gnd, gnd, gnd}),
	.slave_ahb_hburst({gnd, gnd, gnd}),
	.slave_ahb_hwrite(gnd),
	.slave_ahb_haddr({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
	.slave_ahb_hwdata({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
	.slave_ahb_hresp(\rv32.slave_ahb_hresp ),
	.slave_ahb_hrdata({\rv32.slave_ahb_hrdata[31] , \rv32.slave_ahb_hrdata[30] , \rv32.slave_ahb_hrdata[29] , \rv32.slave_ahb_hrdata[28] , \rv32.slave_ahb_hrdata[27] , \rv32.slave_ahb_hrdata[26] , \rv32.slave_ahb_hrdata[25] , \rv32.slave_ahb_hrdata[24] , \rv32.slave_ahb_hrdata[23] , \rv32.slave_ahb_hrdata[22] , \rv32.slave_ahb_hrdata[21] , \rv32.slave_ahb_hrdata[20] , \rv32.slave_ahb_hrdata[19] , \rv32.slave_ahb_hrdata[18] , \rv32.slave_ahb_hrdata[17] , \rv32.slave_ahb_hrdata[16] , \rv32.slave_ahb_hrdata[15] , \rv32.slave_ahb_hrdata[14] , \rv32.slave_ahb_hrdata[13] , \rv32.slave_ahb_hrdata[12] , \rv32.slave_ahb_hrdata[11] , \rv32.slave_ahb_hrdata[10] , \rv32.slave_ahb_hrdata[9] , \rv32.slave_ahb_hrdata[8] , \rv32.slave_ahb_hrdata[7] , \rv32.slave_ahb_hrdata[6] , \rv32.slave_ahb_hrdata[5] , \rv32.slave_ahb_hrdata[4] , \rv32.slave_ahb_hrdata[3] , \rv32.slave_ahb_hrdata[2] , \rv32.slave_ahb_hrdata[1] , \rv32.slave_ahb_hrdata[0] }),
	.gpio0_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
	.gpio0_io_out_data({\rv32.gpio0_io_out_data[7] , \rv32.gpio0_io_out_data[6] , \rv32.gpio0_io_out_data[5] , \rv32.gpio0_io_out_data[4] , \rv32.gpio0_io_out_data[3] , \rv32.gpio0_io_out_data[2] , \rv32.gpio0_io_out_data[1] , \rv32.gpio0_io_out_data[0] }),
	.gpio0_io_out_en({\rv32.gpio0_io_out_en[7] , \rv32.gpio0_io_out_en[6] , \rv32.gpio0_io_out_en[5] , \rv32.gpio0_io_out_en[4] , \rv32.gpio0_io_out_en[3] , \rv32.gpio0_io_out_en[2] , \rv32.gpio0_io_out_en[1] , \rv32.gpio0_io_out_en[0] }),
	.gpio1_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
	.gpio1_io_out_data({\rv32.gpio1_io_out_data[7] , \rv32.gpio1_io_out_data[6] , \rv32.gpio1_io_out_data[5] , \rv32.gpio1_io_out_data[4] , \rv32.gpio1_io_out_data[3] , \rv32.gpio1_io_out_data[2] , \rv32.gpio1_io_out_data[1] , \rv32.gpio1_io_out_data[0] }),
	.gpio1_io_out_en({\rv32.gpio1_io_out_en[7] , \rv32.gpio1_io_out_en[6] , \rv32.gpio1_io_out_en[5] , \rv32.gpio1_io_out_en[4] , \rv32.gpio1_io_out_en[3] , \rv32.gpio1_io_out_en[2] , \rv32.gpio1_io_out_en[1] , \rv32.gpio1_io_out_en[0] }),
	.sys_ctrl_clkSource({\rv32.sys_ctrl_clkSource[1] , \rv32.sys_ctrl_clkSource[0] }),
	.sys_ctrl_hseEnable(\rv32.sys_ctrl_hseEnable ),
	.sys_ctrl_hseBypass(\rv32.sys_ctrl_hseBypass ),
	.sys_ctrl_pllEnable(\rv32.sys_ctrl_pllEnable ),
	.sys_ctrl_pllReady(\auto_generated_inst.hbo_13_f13ffbd025d547b8_bp ),
	.sys_ctrl_sleep(\rv32.sys_ctrl_sleep ),
	.sys_ctrl_stop(\rv32.sys_ctrl_stop ),
	.sys_ctrl_standby(\rv32.sys_ctrl_standby ),
	.gpio2_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
	.gpio2_io_out_data({\rv32.gpio2_io_out_data[7] , \rv32.gpio2_io_out_data[6] , \rv32.gpio2_io_out_data[5] , \rv32.gpio2_io_out_data[4] , \rv32.gpio2_io_out_data[3] , \rv32.gpio2_io_out_data[2] , \rv32.gpio2_io_out_data[1] , \rv32.gpio2_io_out_data[0] }),
	.gpio2_io_out_en({\rv32.gpio2_io_out_en[7] , \rv32.gpio2_io_out_en[6] , \rv32.gpio2_io_out_en[5] , \rv32.gpio2_io_out_en[4] , \rv32.gpio2_io_out_en[3] , \rv32.gpio2_io_out_en[2] , \rv32.gpio2_io_out_en[1] , \rv32.gpio2_io_out_en[0] }),
	.gpio3_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
	.gpio3_io_out_data({\rv32.gpio3_io_out_data[7] , \rv32.gpio3_io_out_data[6] , \rv32.gpio3_io_out_data[5] , \rv32.gpio3_io_out_data[4] , \rv32.gpio3_io_out_data[3] , \rv32.gpio3_io_out_data[2] , \rv32.gpio3_io_out_data[1] , \rv32.gpio3_io_out_data[0] }),
	.gpio3_io_out_en({\rv32.gpio3_io_out_en[7] , \rv32.gpio3_io_out_en[6] , \rv32.gpio3_io_out_en[5] , \rv32.gpio3_io_out_en[4] , \rv32.gpio3_io_out_en[3] , \rv32.gpio3_io_out_en[2] , \rv32.gpio3_io_out_en[1] , \rv32.gpio3_io_out_en[0] }),
	.gpio4_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
	.gpio4_io_out_data({\rv32.gpio4_io_out_data[7] , \rv32.gpio4_io_out_data[6] , \rv32.gpio4_io_out_data[5] , \rv32.gpio4_io_out_data[4] , \rv32.gpio4_io_out_data[3] , \rv32.gpio4_io_out_data[2] , \rv32.gpio4_io_out_data[1] , \rv32.gpio4_io_out_data[0] }),
	.gpio4_io_out_en({\rv32.gpio4_io_out_en[7] , \rv32.gpio4_io_out_en[6] , \rv32.gpio4_io_out_en[5] , \rv32.gpio4_io_out_en[4] , \rv32.gpio4_io_out_en[3] , \rv32.gpio4_io_out_en[2] , \rv32.gpio4_io_out_en[1] , \rv32.gpio4_io_out_en[0] }),
	.gpio5_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
	.gpio5_io_out_data({\rv32.gpio5_io_out_data[7] , \rv32.gpio5_io_out_data[6] , \rv32.gpio5_io_out_data[5] , \rv32.gpio5_io_out_data[4] , \rv32.gpio5_io_out_data[3] , \rv32.gpio5_io_out_data[2] , \rv32.gpio5_io_out_data[1] , \rv32.gpio5_io_out_data[0] }),
	.gpio5_io_out_en({\rv32.gpio5_io_out_en[7] , \rv32.gpio5_io_out_en[6] , \rv32.gpio5_io_out_en[5] , \rv32.gpio5_io_out_en[4] , \rv32.gpio5_io_out_en[3] , \rv32.gpio5_io_out_en[2] , \rv32.gpio5_io_out_en[1] , \rv32.gpio5_io_out_en[0] }),
	.gpio6_io_in({gnd, gnd, gnd, gnd, gnd, gnd, \UART0_UARTRXD~input_o , gnd}),
	.gpio6_io_out_data({\rv32.gpio6_io_out_data[7] , \rv32.gpio6_io_out_data[6] , \rv32.gpio6_io_out_data[5] , \rv32.gpio6_io_out_data[4] , \rv32.gpio6_io_out_data[3] , \rv32.gpio6_io_out_data[2] , \rv32.gpio6_io_out_data[1] , \rv32.gpio6_io_out_data[0] }),
	.gpio6_io_out_en({\rv32.gpio6_io_out_en[7] , \rv32.gpio6_io_out_en[6] , \rv32.gpio6_io_out_en[5] , \rv32.gpio6_io_out_en[4] , \rv32.gpio6_io_out_en[3] , \rv32.gpio6_io_out_en[2] , \rv32.gpio6_io_out_en[1] , \rv32.gpio6_io_out_en[0] }),
	.gpio7_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
	.gpio7_io_out_data({\rv32.gpio7_io_out_data[7] , \rv32.gpio7_io_out_data[6] , \rv32.gpio7_io_out_data[5] , \rv32.gpio7_io_out_data[4] , \rv32.gpio7_io_out_data[3] , \rv32.gpio7_io_out_data[2] , \rv32.gpio7_io_out_data[1] , \rv32.gpio7_io_out_data[0] }),
	.gpio7_io_out_en({\rv32.gpio7_io_out_en[7] , \rv32.gpio7_io_out_en[6] , \rv32.gpio7_io_out_en[5] , \rv32.gpio7_io_out_en[4] , \rv32.gpio7_io_out_en[3] , \rv32.gpio7_io_out_en[2] , \rv32.gpio7_io_out_en[1] , \rv32.gpio7_io_out_en[0] }),
	.gpio8_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
	.gpio8_io_out_data({\rv32.gpio8_io_out_data[7] , \rv32.gpio8_io_out_data[6] , \rv32.gpio8_io_out_data[5] , \rv32.gpio8_io_out_data[4] , \rv32.gpio8_io_out_data[3] , \rv32.gpio8_io_out_data[2] , \rv32.gpio8_io_out_data[1] , \rv32.gpio8_io_out_data[0] }),
	.gpio8_io_out_en({\rv32.gpio8_io_out_en[7] , \rv32.gpio8_io_out_en[6] , \rv32.gpio8_io_out_en[5] , \rv32.gpio8_io_out_en[4] , \rv32.gpio8_io_out_en[3] , \rv32.gpio8_io_out_en[2] , \rv32.gpio8_io_out_en[1] , \rv32.gpio8_io_out_en[0] }),
	.gpio9_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
	.gpio9_io_out_data({\rv32.gpio9_io_out_data[7] , \rv32.gpio9_io_out_data[6] , \rv32.gpio9_io_out_data[5] , \rv32.gpio9_io_out_data[4] , \rv32.gpio9_io_out_data[3] , \rv32.gpio9_io_out_data[2] , \rv32.gpio9_io_out_data[1] , \rv32.gpio9_io_out_data[0] }),
	.gpio9_io_out_en({\rv32.gpio9_io_out_en[7] , \rv32.gpio9_io_out_en[6] , \rv32.gpio9_io_out_en[5] , \rv32.gpio9_io_out_en[4] , \rv32.gpio9_io_out_en[3] , \rv32.gpio9_io_out_en[2] , \rv32.gpio9_io_out_en[1] , \rv32.gpio9_io_out_en[0] }),
	.ext_resetn(vcc),
	.resetn_out(\rv32.resetn_out ),
	.dmactive(\rv32.dmactive ),
	.swj_JTAGNSW(\rv32.swj_JTAGNSW ),
	.swj_JTAGSTATE({\rv32.swj_JTAGSTATE[3] , \rv32.swj_JTAGSTATE[2] , \rv32.swj_JTAGSTATE[1] , \rv32.swj_JTAGSTATE[0] }),
	.swj_JTAGIR({\rv32.swj_JTAGIR[3] , \rv32.swj_JTAGIR[2] , \rv32.swj_JTAGIR[1] , \rv32.swj_JTAGIR[0] }),
	.ext_int({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
	.ext_dma_DMACBREQ({gnd, gnd, gnd, gnd}),
	.ext_dma_DMACLBREQ({gnd, gnd, gnd, gnd}),
	.ext_dma_DMACSREQ({gnd, gnd, gnd, gnd}),
	.ext_dma_DMACLSREQ({gnd, gnd, gnd, gnd}),
	.ext_dma_DMACCLR({\rv32.ext_dma_DMACCLR[3] , \rv32.ext_dma_DMACCLR[2] , \rv32.ext_dma_DMACCLR[1] , \rv32.ext_dma_DMACCLR[0] }),
	.ext_dma_DMACTC({\rv32.ext_dma_DMACTC[3] , \rv32.ext_dma_DMACTC[2] , \rv32.ext_dma_DMACTC[1] , \rv32.ext_dma_DMACTC[0] }),
	.local_int({gnd, gnd, gnd, gnd}),
	.test_mode({gnd, gnd}),
	.usb0_xcvr_clk(vcc),
	.usb0_id(vcc));
defparam rv32.coord_x = 0;
defparam rv32.coord_y = 5;
defparam rv32.coord_z = 0;

alta_rio \sram_cs_n~output (
	.padio(sram_cs_n),
	.datain(!\macro_inst|u_sram|sram_cs_n~q ),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\sram_cs_n~input_o ),
	.regout());
defparam \sram_cs_n~output .coord_x = 0;
defparam \sram_cs_n~output .coord_y = 4;
defparam \sram_cs_n~output .coord_z = 3;
defparam \sram_cs_n~output .IN_ASYNC_MODE = 1'b0;
defparam \sram_cs_n~output .IN_SYNC_MODE = 1'b0;
defparam \sram_cs_n~output .IN_POWERUP = 1'b0;
defparam \sram_cs_n~output .OUT_REG_MODE = 1'b0;
defparam \sram_cs_n~output .OUT_ASYNC_MODE = 1'b0;
defparam \sram_cs_n~output .OUT_SYNC_MODE = 1'b0;
defparam \sram_cs_n~output .OUT_POWERUP = 1'b0;
defparam \sram_cs_n~output .OE_REG_MODE = 1'b0;
defparam \sram_cs_n~output .OE_ASYNC_MODE = 1'b0;
defparam \sram_cs_n~output .OE_SYNC_MODE = 1'b0;
defparam \sram_cs_n~output .OE_POWERUP = 1'b0;
defparam \sram_cs_n~output .CFG_TRI_INPUT = 1'b0;
defparam \sram_cs_n~output .CFG_INPUT_EN = 1'b0;
defparam \sram_cs_n~output .CFG_PULL_UP = 1'b0;
defparam \sram_cs_n~output .CFG_SLR = 1'b0;
defparam \sram_cs_n~output .CFG_OPEN_DRAIN = 1'b0;
defparam \sram_cs_n~output .CFG_PDRCTRL = 4'b0100;
defparam \sram_cs_n~output .CFG_KEEP = 2'b00;
defparam \sram_cs_n~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \sram_cs_n~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \sram_cs_n~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \sram_cs_n~output .CFG_LVDS_IN_EN = 1'b0;
defparam \sram_cs_n~output .DPCLK_DELAY = 4'b0000;
defparam \sram_cs_n~output .OUT_DELAY = 1'b0;
defparam \sram_cs_n~output .IN_DATA_DELAY = 3'b000;
defparam \sram_cs_n~output .IN_REG_DELAY = 3'b000;

alta_syncctrl syncload_ctrl_X56_Y1(
	.Din(),
	.Dout(SyncLoad_X56_Y1_GND));
defparam syncload_ctrl_X56_Y1.coord_x = 15;
defparam syncload_ctrl_X56_Y1.coord_y = 10;
defparam syncload_ctrl_X56_Y1.coord_z = 1;
defparam syncload_ctrl_X56_Y1.SyncCtrlMux = 2'b00;

alta_syncctrl syncload_ctrl_X56_Y2(
	.Din(),
	.Dout(SyncLoad_X56_Y2_VCC));
defparam syncload_ctrl_X56_Y2.coord_x = 18;
defparam syncload_ctrl_X56_Y2.coord_y = 11;
defparam syncload_ctrl_X56_Y2.coord_z = 1;
defparam syncload_ctrl_X56_Y2.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X56_Y3(
	.Din(\macro_inst|ahb2apb_inst|psel~q ),
	.Dout(\macro_inst|ahb2apb_inst|psel~q__SyncLoad_X56_Y3_INV ));
defparam syncload_ctrl_X56_Y3.coord_x = 14;
defparam syncload_ctrl_X56_Y3.coord_y = 11;
defparam syncload_ctrl_X56_Y3.coord_z = 1;
defparam syncload_ctrl_X56_Y3.SyncCtrlMux = 2'b11;

alta_syncctrl syncload_ctrl_X57_Y1(
	.Din(),
	.Dout(SyncLoad_X57_Y1_GND));
defparam syncload_ctrl_X57_Y1.coord_x = 20;
defparam syncload_ctrl_X57_Y1.coord_y = 10;
defparam syncload_ctrl_X57_Y1.coord_z = 1;
defparam syncload_ctrl_X57_Y1.SyncCtrlMux = 2'b00;

alta_syncctrl syncload_ctrl_X57_Y2(
	.Din(),
	.Dout(SyncLoad_X57_Y2_VCC));
defparam syncload_ctrl_X57_Y2.coord_x = 18;
defparam syncload_ctrl_X57_Y2.coord_y = 10;
defparam syncload_ctrl_X57_Y2.coord_z = 1;
defparam syncload_ctrl_X57_Y2.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X57_Y3(
	.Din(),
	.Dout(SyncLoad_X57_Y3_VCC));
defparam syncload_ctrl_X57_Y3.coord_x = 15;
defparam syncload_ctrl_X57_Y3.coord_y = 9;
defparam syncload_ctrl_X57_Y3.coord_z = 1;
defparam syncload_ctrl_X57_Y3.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X57_Y4(
	.Din(),
	.Dout(SyncLoad_X57_Y4_GND));
defparam syncload_ctrl_X57_Y4.coord_x = 16;
defparam syncload_ctrl_X57_Y4.coord_y = 11;
defparam syncload_ctrl_X57_Y4.coord_z = 1;
defparam syncload_ctrl_X57_Y4.SyncCtrlMux = 2'b00;

alta_syncctrl syncload_ctrl_X58_Y1(
	.Din(),
	.Dout(SyncLoad_X58_Y1_VCC));
defparam syncload_ctrl_X58_Y1.coord_x = 16;
defparam syncload_ctrl_X58_Y1.coord_y = 12;
defparam syncload_ctrl_X58_Y1.coord_z = 1;
defparam syncload_ctrl_X58_Y1.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X58_Y2(
	.Din(),
	.Dout(SyncLoad_X58_Y2_VCC));
defparam syncload_ctrl_X58_Y2.coord_x = 17;
defparam syncload_ctrl_X58_Y2.coord_y = 10;
defparam syncload_ctrl_X58_Y2.coord_z = 1;
defparam syncload_ctrl_X58_Y2.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X58_Y3(
	.Din(),
	.Dout(SyncLoad_X58_Y3_VCC));
defparam syncload_ctrl_X58_Y3.coord_x = 16;
defparam syncload_ctrl_X58_Y3.coord_y = 9;
defparam syncload_ctrl_X58_Y3.coord_z = 1;
defparam syncload_ctrl_X58_Y3.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X59_Y1(
	.Din(),
	.Dout(SyncLoad_X59_Y1_VCC));
defparam syncload_ctrl_X59_Y1.coord_x = 15;
defparam syncload_ctrl_X59_Y1.coord_y = 8;
defparam syncload_ctrl_X59_Y1.coord_z = 1;
defparam syncload_ctrl_X59_Y1.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X59_Y2(
	.Din(),
	.Dout(SyncLoad_X59_Y2_VCC));
defparam syncload_ctrl_X59_Y2.coord_x = 16;
defparam syncload_ctrl_X59_Y2.coord_y = 10;
defparam syncload_ctrl_X59_Y2.coord_z = 1;
defparam syncload_ctrl_X59_Y2.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X59_Y3(
	.Din(\macro_inst|u_reg_sram_addr|always0~0_combout ),
	.Dout(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y3_SIG ));
defparam syncload_ctrl_X59_Y3.coord_x = 14;
defparam syncload_ctrl_X59_Y3.coord_y = 9;
defparam syncload_ctrl_X59_Y3.coord_z = 1;
defparam syncload_ctrl_X59_Y3.SyncCtrlMux = 2'b10;

alta_syncctrl syncload_ctrl_X59_Y4(
	.Din(\macro_inst|u_reg_sram_addr|always0~0_combout ),
	.Dout(\macro_inst|u_reg_sram_addr|always0~0_combout__SyncLoad_X59_Y4_SIG ));
defparam syncload_ctrl_X59_Y4.coord_x = 14;
defparam syncload_ctrl_X59_Y4.coord_y = 10;
defparam syncload_ctrl_X59_Y4.coord_z = 1;
defparam syncload_ctrl_X59_Y4.SyncCtrlMux = 2'b10;

alta_syncctrl syncload_ctrl_X60_Y1(
	.Din(\macro_inst|ahb2apb_inst|psel~q ),
	.Dout(\macro_inst|ahb2apb_inst|psel~q__SyncLoad_X60_Y1_INV ));
defparam syncload_ctrl_X60_Y1.coord_x = 14;
defparam syncload_ctrl_X60_Y1.coord_y = 8;
defparam syncload_ctrl_X60_Y1.coord_z = 1;
defparam syncload_ctrl_X60_Y1.SyncCtrlMux = 2'b11;

alta_syncctrl syncload_ctrl_X60_Y2(
	.Din(),
	.Dout(SyncLoad_X60_Y2_VCC));
defparam syncload_ctrl_X60_Y2.coord_x = 17;
defparam syncload_ctrl_X60_Y2.coord_y = 12;
defparam syncload_ctrl_X60_Y2.coord_z = 1;
defparam syncload_ctrl_X60_Y2.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X60_Y3(
	.Din(),
	.Dout(SyncLoad_X60_Y3_VCC));
defparam syncload_ctrl_X60_Y3.coord_x = 14;
defparam syncload_ctrl_X60_Y3.coord_y = 12;
defparam syncload_ctrl_X60_Y3.coord_z = 1;
defparam syncload_ctrl_X60_Y3.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X60_Y4(
	.Din(),
	.Dout(SyncLoad_X60_Y4_VCC));
defparam syncload_ctrl_X60_Y4.coord_x = 19;
defparam syncload_ctrl_X60_Y4.coord_y = 10;
defparam syncload_ctrl_X60_Y4.coord_z = 1;
defparam syncload_ctrl_X60_Y4.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X61_Y1(
	.Din(),
	.Dout(SyncLoad_X61_Y1_VCC));
defparam syncload_ctrl_X61_Y1.coord_x = 16;
defparam syncload_ctrl_X61_Y1.coord_y = 8;
defparam syncload_ctrl_X61_Y1.coord_z = 1;
defparam syncload_ctrl_X61_Y1.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X61_Y2(
	.Din(),
	.Dout(SyncLoad_X61_Y2_VCC));
defparam syncload_ctrl_X61_Y2.coord_x = 18;
defparam syncload_ctrl_X61_Y2.coord_y = 12;
defparam syncload_ctrl_X61_Y2.coord_z = 1;
defparam syncload_ctrl_X61_Y2.SyncCtrlMux = 2'b01;

alta_syncctrl syncload_ctrl_X61_Y3(
	.Din(),
	.Dout(SyncLoad_X61_Y3_VCC));
defparam syncload_ctrl_X61_Y3.coord_x = 15;
defparam syncload_ctrl_X61_Y3.coord_y = 12;
defparam syncload_ctrl_X61_Y3.coord_z = 1;
defparam syncload_ctrl_X61_Y3.SyncCtrlMux = 2'b01;

alta_syncctrl syncreset_ctrl_X56_Y1(
	.Din(\macro_inst|ahb2apb_inst|penable~q ),
	.Dout(\macro_inst|ahb2apb_inst|penable~q__SyncReset_X56_Y1_SIG ));
defparam syncreset_ctrl_X56_Y1.coord_x = 15;
defparam syncreset_ctrl_X56_Y1.coord_y = 10;
defparam syncreset_ctrl_X56_Y1.coord_z = 0;
defparam syncreset_ctrl_X56_Y1.SyncCtrlMux = 2'b10;

alta_syncctrl syncreset_ctrl_X56_Y2(
	.Din(),
	.Dout(SyncReset_X56_Y2_GND));
defparam syncreset_ctrl_X56_Y2.coord_x = 18;
defparam syncreset_ctrl_X56_Y2.coord_y = 11;
defparam syncreset_ctrl_X56_Y2.coord_z = 0;
defparam syncreset_ctrl_X56_Y2.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X56_Y3(
	.Din(),
	.Dout(SyncReset_X56_Y3_GND));
defparam syncreset_ctrl_X56_Y3.coord_x = 14;
defparam syncreset_ctrl_X56_Y3.coord_y = 11;
defparam syncreset_ctrl_X56_Y3.coord_z = 0;
defparam syncreset_ctrl_X56_Y3.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X57_Y1(
	.Din(\macro_inst|ahb2apb_inst|psel~q ),
	.Dout(\macro_inst|ahb2apb_inst|psel~q__SyncReset_X57_Y1_INV ));
defparam syncreset_ctrl_X57_Y1.coord_x = 20;
defparam syncreset_ctrl_X57_Y1.coord_y = 10;
defparam syncreset_ctrl_X57_Y1.coord_z = 0;
defparam syncreset_ctrl_X57_Y1.SyncCtrlMux = 2'b11;

alta_syncctrl syncreset_ctrl_X57_Y2(
	.Din(),
	.Dout(SyncReset_X57_Y2_GND));
defparam syncreset_ctrl_X57_Y2.coord_x = 18;
defparam syncreset_ctrl_X57_Y2.coord_y = 10;
defparam syncreset_ctrl_X57_Y2.coord_z = 0;
defparam syncreset_ctrl_X57_Y2.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X57_Y3(
	.Din(),
	.Dout(SyncReset_X57_Y3_GND));
defparam syncreset_ctrl_X57_Y3.coord_x = 15;
defparam syncreset_ctrl_X57_Y3.coord_y = 9;
defparam syncreset_ctrl_X57_Y3.coord_z = 0;
defparam syncreset_ctrl_X57_Y3.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X57_Y4(
	.Din(\macro_inst|u_sram|sram_cs_n~0_combout ),
	.Dout(\macro_inst|u_sram|sram_cs_n~0_combout__SyncReset_X57_Y4_SIG ));
defparam syncreset_ctrl_X57_Y4.coord_x = 16;
defparam syncreset_ctrl_X57_Y4.coord_y = 11;
defparam syncreset_ctrl_X57_Y4.coord_z = 0;
defparam syncreset_ctrl_X57_Y4.SyncCtrlMux = 2'b10;

alta_syncctrl syncreset_ctrl_X58_Y1(
	.Din(),
	.Dout(SyncReset_X58_Y1_GND));
defparam syncreset_ctrl_X58_Y1.coord_x = 16;
defparam syncreset_ctrl_X58_Y1.coord_y = 12;
defparam syncreset_ctrl_X58_Y1.coord_z = 0;
defparam syncreset_ctrl_X58_Y1.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X58_Y2(
	.Din(),
	.Dout(SyncReset_X58_Y2_GND));
defparam syncreset_ctrl_X58_Y2.coord_x = 17;
defparam syncreset_ctrl_X58_Y2.coord_y = 10;
defparam syncreset_ctrl_X58_Y2.coord_z = 0;
defparam syncreset_ctrl_X58_Y2.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X58_Y3(
	.Din(),
	.Dout(SyncReset_X58_Y3_GND));
defparam syncreset_ctrl_X58_Y3.coord_x = 16;
defparam syncreset_ctrl_X58_Y3.coord_y = 9;
defparam syncreset_ctrl_X58_Y3.coord_z = 0;
defparam syncreset_ctrl_X58_Y3.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X59_Y1(
	.Din(),
	.Dout(SyncReset_X59_Y1_GND));
defparam syncreset_ctrl_X59_Y1.coord_x = 15;
defparam syncreset_ctrl_X59_Y1.coord_y = 8;
defparam syncreset_ctrl_X59_Y1.coord_z = 0;
defparam syncreset_ctrl_X59_Y1.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X59_Y2(
	.Din(),
	.Dout(SyncReset_X59_Y2_GND));
defparam syncreset_ctrl_X59_Y2.coord_x = 16;
defparam syncreset_ctrl_X59_Y2.coord_y = 10;
defparam syncreset_ctrl_X59_Y2.coord_z = 0;
defparam syncreset_ctrl_X59_Y2.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X59_Y3(
	.Din(),
	.Dout(SyncReset_X59_Y3_GND));
defparam syncreset_ctrl_X59_Y3.coord_x = 14;
defparam syncreset_ctrl_X59_Y3.coord_y = 9;
defparam syncreset_ctrl_X59_Y3.coord_z = 0;
defparam syncreset_ctrl_X59_Y3.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X59_Y4(
	.Din(),
	.Dout(SyncReset_X59_Y4_GND));
defparam syncreset_ctrl_X59_Y4.coord_x = 14;
defparam syncreset_ctrl_X59_Y4.coord_y = 10;
defparam syncreset_ctrl_X59_Y4.coord_z = 0;
defparam syncreset_ctrl_X59_Y4.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X60_Y1(
	.Din(),
	.Dout(SyncReset_X60_Y1_GND));
defparam syncreset_ctrl_X60_Y1.coord_x = 14;
defparam syncreset_ctrl_X60_Y1.coord_y = 8;
defparam syncreset_ctrl_X60_Y1.coord_z = 0;
defparam syncreset_ctrl_X60_Y1.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X60_Y2(
	.Din(),
	.Dout(SyncReset_X60_Y2_GND));
defparam syncreset_ctrl_X60_Y2.coord_x = 17;
defparam syncreset_ctrl_X60_Y2.coord_y = 12;
defparam syncreset_ctrl_X60_Y2.coord_z = 0;
defparam syncreset_ctrl_X60_Y2.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X60_Y3(
	.Din(),
	.Dout(SyncReset_X60_Y3_GND));
defparam syncreset_ctrl_X60_Y3.coord_x = 14;
defparam syncreset_ctrl_X60_Y3.coord_y = 12;
defparam syncreset_ctrl_X60_Y3.coord_z = 0;
defparam syncreset_ctrl_X60_Y3.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X60_Y4(
	.Din(),
	.Dout(SyncReset_X60_Y4_GND));
defparam syncreset_ctrl_X60_Y4.coord_x = 19;
defparam syncreset_ctrl_X60_Y4.coord_y = 10;
defparam syncreset_ctrl_X60_Y4.coord_z = 0;
defparam syncreset_ctrl_X60_Y4.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X61_Y1(
	.Din(),
	.Dout(SyncReset_X61_Y1_GND));
defparam syncreset_ctrl_X61_Y1.coord_x = 16;
defparam syncreset_ctrl_X61_Y1.coord_y = 8;
defparam syncreset_ctrl_X61_Y1.coord_z = 0;
defparam syncreset_ctrl_X61_Y1.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X61_Y2(
	.Din(),
	.Dout(SyncReset_X61_Y2_GND));
defparam syncreset_ctrl_X61_Y2.coord_x = 18;
defparam syncreset_ctrl_X61_Y2.coord_y = 12;
defparam syncreset_ctrl_X61_Y2.coord_z = 0;
defparam syncreset_ctrl_X61_Y2.SyncCtrlMux = 2'b00;

alta_syncctrl syncreset_ctrl_X61_Y3(
	.Din(),
	.Dout(SyncReset_X61_Y3_GND));
defparam syncreset_ctrl_X61_Y3.coord_x = 15;
defparam syncreset_ctrl_X61_Y3.coord_y = 12;
defparam syncreset_ctrl_X61_Y3.coord_z = 0;
defparam syncreset_ctrl_X61_Y3.SyncCtrlMux = 2'b00;

alta_slice sys_resetn(
	.A(\rv32.resetn_out ),
	.B(vcc),
	.C(vcc),
	.D(vcc),
	.Cin(),
	.Qin(),
	.Clk(),
	.AsyncReset(),
	.SyncReset(),
	.ShiftData(),
	.SyncLoad(),
	.LutOut(\sys_resetn~combout ),
	.Cout(),
	.Q());
defparam sys_resetn.coord_x = 9;
defparam sys_resetn.coord_y = 4;
defparam sys_resetn.coord_z = 15;
defparam sys_resetn.mask = 16'h5555;
defparam sys_resetn.modeMux = 1'b0;
defparam sys_resetn.FeedbackMux = 1'b0;
defparam sys_resetn.ShiftMux = 1'b0;
defparam sys_resetn.BypassEn = 1'b0;
defparam sys_resetn.CarryEnb = 1'b1;

alta_io_gclk \sys_resetn~clkctrl (
	.inclk(\sys_resetn~combout ),
	.outclk(\sys_resetn~clkctrl_outclk ));
defparam \sys_resetn~clkctrl .coord_x = 22;
defparam \sys_resetn~clkctrl .coord_y = 4;
defparam \sys_resetn~clkctrl .coord_z = 3;

alta_rio \z80_addr[0]~output (
	.padio(z80_addr[0]),
	.datain(\macro_inst|u_sram|sram_addr [0]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[0]~input_o ),
	.regout());
defparam \z80_addr[0]~output .coord_x = 22;
defparam \z80_addr[0]~output .coord_y = 3;
defparam \z80_addr[0]~output .coord_z = 2;
defparam \z80_addr[0]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[0]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[0]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[0]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[0]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[0]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[0]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[0]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[0]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[0]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[0]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[0]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[0]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[0]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[0]~output .CFG_SLR = 1'b0;
defparam \z80_addr[0]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[0]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[0]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[0]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[0]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[0]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[0]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[0]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[0]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[0]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[0]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[10]~output (
	.padio(z80_addr[10]),
	.datain(\macro_inst|u_sram|sram_addr [10]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[10]~input_o ),
	.regout());
defparam \z80_addr[10]~output .coord_x = 16;
defparam \z80_addr[10]~output .coord_y = 13;
defparam \z80_addr[10]~output .coord_z = 0;
defparam \z80_addr[10]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[10]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[10]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[10]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[10]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[10]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[10]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[10]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[10]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[10]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[10]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[10]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[10]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[10]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[10]~output .CFG_SLR = 1'b0;
defparam \z80_addr[10]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[10]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[10]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[10]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[10]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[10]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[10]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[10]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[10]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[10]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[10]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[11]~output (
	.padio(z80_addr[11]),
	.datain(\macro_inst|u_sram|sram_addr [11]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[11]~input_o ),
	.regout());
defparam \z80_addr[11]~output .coord_x = 15;
defparam \z80_addr[11]~output .coord_y = 13;
defparam \z80_addr[11]~output .coord_z = 2;
defparam \z80_addr[11]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[11]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[11]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[11]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[11]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[11]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[11]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[11]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[11]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[11]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[11]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[11]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[11]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[11]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[11]~output .CFG_SLR = 1'b0;
defparam \z80_addr[11]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[11]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[11]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[11]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[11]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[11]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[11]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[11]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[11]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[11]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[11]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[12]~output (
	.padio(z80_addr[12]),
	.datain(\macro_inst|u_sram|sram_addr [12]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[12]~input_o ),
	.regout());
defparam \z80_addr[12]~output .coord_x = 14;
defparam \z80_addr[12]~output .coord_y = 13;
defparam \z80_addr[12]~output .coord_z = 2;
defparam \z80_addr[12]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[12]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[12]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[12]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[12]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[12]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[12]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[12]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[12]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[12]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[12]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[12]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[12]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[12]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[12]~output .CFG_SLR = 1'b0;
defparam \z80_addr[12]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[12]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[12]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[12]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[12]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[12]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[12]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[12]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[12]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[12]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[12]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[13]~output (
	.padio(z80_addr[13]),
	.datain(\macro_inst|u_sram|sram_addr [13]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[13]~input_o ),
	.regout());
defparam \z80_addr[13]~output .coord_x = 0;
defparam \z80_addr[13]~output .coord_y = 4;
defparam \z80_addr[13]~output .coord_z = 0;
defparam \z80_addr[13]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[13]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[13]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[13]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[13]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[13]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[13]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[13]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[13]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[13]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[13]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[13]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[13]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[13]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[13]~output .CFG_SLR = 1'b0;
defparam \z80_addr[13]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[13]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[13]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[13]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[13]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[13]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[13]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[13]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[13]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[13]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[13]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[14]~output (
	.padio(z80_addr[14]),
	.datain(\macro_inst|u_sram|sram_addr [14]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[14]~input_o ),
	.regout());
defparam \z80_addr[14]~output .coord_x = 0;
defparam \z80_addr[14]~output .coord_y = 4;
defparam \z80_addr[14]~output .coord_z = 2;
defparam \z80_addr[14]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[14]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[14]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[14]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[14]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[14]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[14]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[14]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[14]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[14]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[14]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[14]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[14]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[14]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[14]~output .CFG_SLR = 1'b0;
defparam \z80_addr[14]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[14]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[14]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[14]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[14]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[14]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[14]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[14]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[14]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[14]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[14]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[15]~output (
	.padio(z80_addr[15]),
	.datain(\macro_inst|u_sram|sram_addr [15]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[15]~input_o ),
	.regout());
defparam \z80_addr[15]~output .coord_x = 0;
defparam \z80_addr[15]~output .coord_y = 4;
defparam \z80_addr[15]~output .coord_z = 4;
defparam \z80_addr[15]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[15]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[15]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[15]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[15]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[15]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[15]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[15]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[15]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[15]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[15]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[15]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[15]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[15]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[15]~output .CFG_SLR = 1'b0;
defparam \z80_addr[15]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[15]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[15]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[15]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[15]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[15]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[15]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[15]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[15]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[15]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[15]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[1]~output (
	.padio(z80_addr[1]),
	.datain(\macro_inst|u_sram|sram_addr [1]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[1]~input_o ),
	.regout());
defparam \z80_addr[1]~output .coord_x = 22;
defparam \z80_addr[1]~output .coord_y = 3;
defparam \z80_addr[1]~output .coord_z = 0;
defparam \z80_addr[1]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[1]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[1]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[1]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[1]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[1]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[1]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[1]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[1]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[1]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[1]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[1]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[1]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[1]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[1]~output .CFG_SLR = 1'b0;
defparam \z80_addr[1]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[1]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[1]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[1]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[1]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[1]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[1]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[1]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[1]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[1]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[1]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[2]~output (
	.padio(z80_addr[2]),
	.datain(\macro_inst|u_sram|sram_addr [2]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[2]~input_o ),
	.regout());
defparam \z80_addr[2]~output .coord_x = 20;
defparam \z80_addr[2]~output .coord_y = 13;
defparam \z80_addr[2]~output .coord_z = 2;
defparam \z80_addr[2]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[2]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[2]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[2]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[2]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[2]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[2]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[2]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[2]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[2]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[2]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[2]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[2]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[2]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[2]~output .CFG_SLR = 1'b0;
defparam \z80_addr[2]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[2]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[2]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[2]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[2]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[2]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[2]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[2]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[2]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[2]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[2]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[3]~output (
	.padio(z80_addr[3]),
	.datain(\macro_inst|u_sram|sram_addr [3]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[3]~input_o ),
	.regout());
defparam \z80_addr[3]~output .coord_x = 19;
defparam \z80_addr[3]~output .coord_y = 13;
defparam \z80_addr[3]~output .coord_z = 3;
defparam \z80_addr[3]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[3]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[3]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[3]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[3]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[3]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[3]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[3]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[3]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[3]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[3]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[3]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[3]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[3]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[3]~output .CFG_SLR = 1'b0;
defparam \z80_addr[3]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[3]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[3]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[3]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[3]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[3]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[3]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[3]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[3]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[3]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[3]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[4]~output (
	.padio(z80_addr[4]),
	.datain(\macro_inst|u_sram|sram_addr [4]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[4]~input_o ),
	.regout());
defparam \z80_addr[4]~output .coord_x = 19;
defparam \z80_addr[4]~output .coord_y = 13;
defparam \z80_addr[4]~output .coord_z = 1;
defparam \z80_addr[4]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[4]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[4]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[4]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[4]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[4]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[4]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[4]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[4]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[4]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[4]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[4]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[4]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[4]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[4]~output .CFG_SLR = 1'b0;
defparam \z80_addr[4]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[4]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[4]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[4]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[4]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[4]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[4]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[4]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[4]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[4]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[4]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[5]~output (
	.padio(z80_addr[5]),
	.datain(\macro_inst|u_sram|sram_addr [5]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[5]~input_o ),
	.regout());
defparam \z80_addr[5]~output .coord_x = 18;
defparam \z80_addr[5]~output .coord_y = 13;
defparam \z80_addr[5]~output .coord_z = 3;
defparam \z80_addr[5]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[5]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[5]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[5]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[5]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[5]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[5]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[5]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[5]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[5]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[5]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[5]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[5]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[5]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[5]~output .CFG_SLR = 1'b0;
defparam \z80_addr[5]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[5]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[5]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[5]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[5]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[5]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[5]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[5]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[5]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[5]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[5]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[6]~output (
	.padio(z80_addr[6]),
	.datain(\macro_inst|u_sram|sram_addr [6]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[6]~input_o ),
	.regout());
defparam \z80_addr[6]~output .coord_x = 18;
defparam \z80_addr[6]~output .coord_y = 13;
defparam \z80_addr[6]~output .coord_z = 1;
defparam \z80_addr[6]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[6]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[6]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[6]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[6]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[6]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[6]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[6]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[6]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[6]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[6]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[6]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[6]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[6]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[6]~output .CFG_SLR = 1'b0;
defparam \z80_addr[6]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[6]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[6]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[6]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[6]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[6]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[6]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[6]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[6]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[6]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[6]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[7]~output (
	.padio(z80_addr[7]),
	.datain(\macro_inst|u_sram|sram_addr [7]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[7]~input_o ),
	.regout());
defparam \z80_addr[7]~output .coord_x = 17;
defparam \z80_addr[7]~output .coord_y = 13;
defparam \z80_addr[7]~output .coord_z = 3;
defparam \z80_addr[7]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[7]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[7]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[7]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[7]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[7]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[7]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[7]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[7]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[7]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[7]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[7]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[7]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[7]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[7]~output .CFG_SLR = 1'b0;
defparam \z80_addr[7]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[7]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[7]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[7]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[7]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[7]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[7]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[7]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[7]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[7]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[7]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[8]~output (
	.padio(z80_addr[8]),
	.datain(\macro_inst|u_sram|sram_addr [8]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[8]~input_o ),
	.regout());
defparam \z80_addr[8]~output .coord_x = 17;
defparam \z80_addr[8]~output .coord_y = 13;
defparam \z80_addr[8]~output .coord_z = 0;
defparam \z80_addr[8]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[8]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[8]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[8]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[8]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[8]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[8]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[8]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[8]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[8]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[8]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[8]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[8]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[8]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[8]~output .CFG_SLR = 1'b0;
defparam \z80_addr[8]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[8]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[8]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[8]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[8]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[8]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[8]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[8]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[8]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[8]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[8]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_addr[9]~output (
	.padio(z80_addr[9]),
	.datain(\macro_inst|u_sram|sram_addr [9]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_addr[9]~input_o ),
	.regout());
defparam \z80_addr[9]~output .coord_x = 16;
defparam \z80_addr[9]~output .coord_y = 13;
defparam \z80_addr[9]~output .coord_z = 2;
defparam \z80_addr[9]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_addr[9]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_addr[9]~output .IN_POWERUP = 1'b0;
defparam \z80_addr[9]~output .OUT_REG_MODE = 1'b0;
defparam \z80_addr[9]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_addr[9]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_addr[9]~output .OUT_POWERUP = 1'b0;
defparam \z80_addr[9]~output .OE_REG_MODE = 1'b0;
defparam \z80_addr[9]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_addr[9]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_addr[9]~output .OE_POWERUP = 1'b0;
defparam \z80_addr[9]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_addr[9]~output .CFG_INPUT_EN = 1'b0;
defparam \z80_addr[9]~output .CFG_PULL_UP = 1'b0;
defparam \z80_addr[9]~output .CFG_SLR = 1'b0;
defparam \z80_addr[9]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_addr[9]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_addr[9]~output .CFG_KEEP = 2'b00;
defparam \z80_addr[9]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_addr[9]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_addr[9]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_addr[9]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_addr[9]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_addr[9]~output .OUT_DELAY = 1'b0;
defparam \z80_addr[9]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_addr[9]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_data[0]~output (
	.padio(z80_data[0]),
	.datain(\macro_inst|u_sram|sram_out [0]),
	.oe(\macro_inst|u_sram|sram_out_oe~q ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_data[0]~input_o ),
	.regout());
defparam \z80_data[0]~output .coord_x = 22;
defparam \z80_data[0]~output .coord_y = 3;
defparam \z80_data[0]~output .coord_z = 3;
defparam \z80_data[0]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_data[0]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_data[0]~output .IN_POWERUP = 1'b0;
defparam \z80_data[0]~output .OUT_REG_MODE = 1'b0;
defparam \z80_data[0]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_data[0]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_data[0]~output .OUT_POWERUP = 1'b0;
defparam \z80_data[0]~output .OE_REG_MODE = 1'b0;
defparam \z80_data[0]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_data[0]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_data[0]~output .OE_POWERUP = 1'b0;
defparam \z80_data[0]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_data[0]~output .CFG_INPUT_EN = 1'b1;
defparam \z80_data[0]~output .CFG_PULL_UP = 1'b0;
defparam \z80_data[0]~output .CFG_SLR = 1'b0;
defparam \z80_data[0]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_data[0]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_data[0]~output .CFG_KEEP = 2'b00;
defparam \z80_data[0]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_data[0]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_data[0]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_data[0]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_data[0]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_data[0]~output .OUT_DELAY = 1'b0;
defparam \z80_data[0]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_data[0]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_data[1]~output (
	.padio(z80_data[1]),
	.datain(\macro_inst|u_sram|sram_out [1]),
	.oe(\macro_inst|u_sram|sram_out_oe~q ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_data[1]~input_o ),
	.regout());
defparam \z80_data[1]~output .coord_x = 22;
defparam \z80_data[1]~output .coord_y = 3;
defparam \z80_data[1]~output .coord_z = 1;
defparam \z80_data[1]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_data[1]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_data[1]~output .IN_POWERUP = 1'b0;
defparam \z80_data[1]~output .OUT_REG_MODE = 1'b0;
defparam \z80_data[1]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_data[1]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_data[1]~output .OUT_POWERUP = 1'b0;
defparam \z80_data[1]~output .OE_REG_MODE = 1'b0;
defparam \z80_data[1]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_data[1]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_data[1]~output .OE_POWERUP = 1'b0;
defparam \z80_data[1]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_data[1]~output .CFG_INPUT_EN = 1'b1;
defparam \z80_data[1]~output .CFG_PULL_UP = 1'b0;
defparam \z80_data[1]~output .CFG_SLR = 1'b0;
defparam \z80_data[1]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_data[1]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_data[1]~output .CFG_KEEP = 2'b00;
defparam \z80_data[1]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_data[1]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_data[1]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_data[1]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_data[1]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_data[1]~output .OUT_DELAY = 1'b0;
defparam \z80_data[1]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_data[1]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_data[2]~output (
	.padio(z80_data[2]),
	.datain(\macro_inst|u_sram|sram_out [2]),
	.oe(\macro_inst|u_sram|sram_out_oe~q ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_data[2]~input_o ),
	.regout());
defparam \z80_data[2]~output .coord_x = 20;
defparam \z80_data[2]~output .coord_y = 13;
defparam \z80_data[2]~output .coord_z = 1;
defparam \z80_data[2]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_data[2]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_data[2]~output .IN_POWERUP = 1'b0;
defparam \z80_data[2]~output .OUT_REG_MODE = 1'b0;
defparam \z80_data[2]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_data[2]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_data[2]~output .OUT_POWERUP = 1'b0;
defparam \z80_data[2]~output .OE_REG_MODE = 1'b0;
defparam \z80_data[2]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_data[2]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_data[2]~output .OE_POWERUP = 1'b0;
defparam \z80_data[2]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_data[2]~output .CFG_INPUT_EN = 1'b1;
defparam \z80_data[2]~output .CFG_PULL_UP = 1'b0;
defparam \z80_data[2]~output .CFG_SLR = 1'b0;
defparam \z80_data[2]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_data[2]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_data[2]~output .CFG_KEEP = 2'b00;
defparam \z80_data[2]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_data[2]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_data[2]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_data[2]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_data[2]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_data[2]~output .OUT_DELAY = 1'b0;
defparam \z80_data[2]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_data[2]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_data[3]~output (
	.padio(z80_data[3]),
	.datain(\macro_inst|u_sram|sram_out [3]),
	.oe(\macro_inst|u_sram|sram_out_oe~q ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_data[3]~input_o ),
	.regout());
defparam \z80_data[3]~output .coord_x = 20;
defparam \z80_data[3]~output .coord_y = 13;
defparam \z80_data[3]~output .coord_z = 3;
defparam \z80_data[3]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_data[3]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_data[3]~output .IN_POWERUP = 1'b0;
defparam \z80_data[3]~output .OUT_REG_MODE = 1'b0;
defparam \z80_data[3]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_data[3]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_data[3]~output .OUT_POWERUP = 1'b0;
defparam \z80_data[3]~output .OE_REG_MODE = 1'b0;
defparam \z80_data[3]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_data[3]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_data[3]~output .OE_POWERUP = 1'b0;
defparam \z80_data[3]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_data[3]~output .CFG_INPUT_EN = 1'b1;
defparam \z80_data[3]~output .CFG_PULL_UP = 1'b0;
defparam \z80_data[3]~output .CFG_SLR = 1'b0;
defparam \z80_data[3]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_data[3]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_data[3]~output .CFG_KEEP = 2'b00;
defparam \z80_data[3]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_data[3]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_data[3]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_data[3]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_data[3]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_data[3]~output .OUT_DELAY = 1'b0;
defparam \z80_data[3]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_data[3]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_data[4]~output (
	.padio(z80_data[4]),
	.datain(\macro_inst|u_sram|sram_out [4]),
	.oe(\macro_inst|u_sram|sram_out_oe~q ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_data[4]~input_o ),
	.regout());
defparam \z80_data[4]~output .coord_x = 19;
defparam \z80_data[4]~output .coord_y = 13;
defparam \z80_data[4]~output .coord_z = 2;
defparam \z80_data[4]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_data[4]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_data[4]~output .IN_POWERUP = 1'b0;
defparam \z80_data[4]~output .OUT_REG_MODE = 1'b0;
defparam \z80_data[4]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_data[4]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_data[4]~output .OUT_POWERUP = 1'b0;
defparam \z80_data[4]~output .OE_REG_MODE = 1'b0;
defparam \z80_data[4]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_data[4]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_data[4]~output .OE_POWERUP = 1'b0;
defparam \z80_data[4]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_data[4]~output .CFG_INPUT_EN = 1'b1;
defparam \z80_data[4]~output .CFG_PULL_UP = 1'b0;
defparam \z80_data[4]~output .CFG_SLR = 1'b0;
defparam \z80_data[4]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_data[4]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_data[4]~output .CFG_KEEP = 2'b00;
defparam \z80_data[4]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_data[4]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_data[4]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_data[4]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_data[4]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_data[4]~output .OUT_DELAY = 1'b0;
defparam \z80_data[4]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_data[4]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_data[5]~output (
	.padio(z80_data[5]),
	.datain(\macro_inst|u_sram|sram_out [5]),
	.oe(\macro_inst|u_sram|sram_out_oe~q ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_data[5]~input_o ),
	.regout());
defparam \z80_data[5]~output .coord_x = 19;
defparam \z80_data[5]~output .coord_y = 13;
defparam \z80_data[5]~output .coord_z = 0;
defparam \z80_data[5]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_data[5]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_data[5]~output .IN_POWERUP = 1'b0;
defparam \z80_data[5]~output .OUT_REG_MODE = 1'b0;
defparam \z80_data[5]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_data[5]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_data[5]~output .OUT_POWERUP = 1'b0;
defparam \z80_data[5]~output .OE_REG_MODE = 1'b0;
defparam \z80_data[5]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_data[5]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_data[5]~output .OE_POWERUP = 1'b0;
defparam \z80_data[5]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_data[5]~output .CFG_INPUT_EN = 1'b1;
defparam \z80_data[5]~output .CFG_PULL_UP = 1'b0;
defparam \z80_data[5]~output .CFG_SLR = 1'b0;
defparam \z80_data[5]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_data[5]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_data[5]~output .CFG_KEEP = 2'b00;
defparam \z80_data[5]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_data[5]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_data[5]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_data[5]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_data[5]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_data[5]~output .OUT_DELAY = 1'b0;
defparam \z80_data[5]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_data[5]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_data[6]~output (
	.padio(z80_data[6]),
	.datain(\macro_inst|u_sram|sram_out [6]),
	.oe(\macro_inst|u_sram|sram_out_oe~q ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_data[6]~input_o ),
	.regout());
defparam \z80_data[6]~output .coord_x = 18;
defparam \z80_data[6]~output .coord_y = 13;
defparam \z80_data[6]~output .coord_z = 2;
defparam \z80_data[6]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_data[6]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_data[6]~output .IN_POWERUP = 1'b0;
defparam \z80_data[6]~output .OUT_REG_MODE = 1'b0;
defparam \z80_data[6]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_data[6]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_data[6]~output .OUT_POWERUP = 1'b0;
defparam \z80_data[6]~output .OE_REG_MODE = 1'b0;
defparam \z80_data[6]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_data[6]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_data[6]~output .OE_POWERUP = 1'b0;
defparam \z80_data[6]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_data[6]~output .CFG_INPUT_EN = 1'b1;
defparam \z80_data[6]~output .CFG_PULL_UP = 1'b0;
defparam \z80_data[6]~output .CFG_SLR = 1'b0;
defparam \z80_data[6]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_data[6]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_data[6]~output .CFG_KEEP = 2'b00;
defparam \z80_data[6]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_data[6]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_data[6]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_data[6]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_data[6]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_data[6]~output .OUT_DELAY = 1'b0;
defparam \z80_data[6]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_data[6]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_data[7]~output (
	.padio(z80_data[7]),
	.datain(\macro_inst|u_sram|sram_out [7]),
	.oe(\macro_inst|u_sram|sram_out_oe~q ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_data[7]~input_o ),
	.regout());
defparam \z80_data[7]~output .coord_x = 18;
defparam \z80_data[7]~output .coord_y = 13;
defparam \z80_data[7]~output .coord_z = 0;
defparam \z80_data[7]~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_data[7]~output .IN_SYNC_MODE = 1'b0;
defparam \z80_data[7]~output .IN_POWERUP = 1'b0;
defparam \z80_data[7]~output .OUT_REG_MODE = 1'b0;
defparam \z80_data[7]~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_data[7]~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_data[7]~output .OUT_POWERUP = 1'b0;
defparam \z80_data[7]~output .OE_REG_MODE = 1'b0;
defparam \z80_data[7]~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_data[7]~output .OE_SYNC_MODE = 1'b0;
defparam \z80_data[7]~output .OE_POWERUP = 1'b0;
defparam \z80_data[7]~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_data[7]~output .CFG_INPUT_EN = 1'b1;
defparam \z80_data[7]~output .CFG_PULL_UP = 1'b0;
defparam \z80_data[7]~output .CFG_SLR = 1'b0;
defparam \z80_data[7]~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_data[7]~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_data[7]~output .CFG_KEEP = 2'b00;
defparam \z80_data[7]~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_data[7]~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_data[7]~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_data[7]~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_data[7]~output .DPCLK_DELAY = 4'b0000;
defparam \z80_data[7]~output .OUT_DELAY = 1'b0;
defparam \z80_data[7]~output .IN_DATA_DELAY = 3'b000;
defparam \z80_data[7]~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_rd_n~output (
	.padio(z80_rd_n),
	.datain(!\macro_inst|u_sram|sram_oe_n~q ),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_rd_n~input_o ),
	.regout());
defparam \z80_rd_n~output .coord_x = 0;
defparam \z80_rd_n~output .coord_y = 3;
defparam \z80_rd_n~output .coord_z = 1;
defparam \z80_rd_n~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_rd_n~output .IN_SYNC_MODE = 1'b0;
defparam \z80_rd_n~output .IN_POWERUP = 1'b0;
defparam \z80_rd_n~output .OUT_REG_MODE = 1'b0;
defparam \z80_rd_n~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_rd_n~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_rd_n~output .OUT_POWERUP = 1'b0;
defparam \z80_rd_n~output .OE_REG_MODE = 1'b0;
defparam \z80_rd_n~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_rd_n~output .OE_SYNC_MODE = 1'b0;
defparam \z80_rd_n~output .OE_POWERUP = 1'b0;
defparam \z80_rd_n~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_rd_n~output .CFG_INPUT_EN = 1'b0;
defparam \z80_rd_n~output .CFG_PULL_UP = 1'b0;
defparam \z80_rd_n~output .CFG_SLR = 1'b0;
defparam \z80_rd_n~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_rd_n~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_rd_n~output .CFG_KEEP = 2'b00;
defparam \z80_rd_n~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_rd_n~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_rd_n~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_rd_n~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_rd_n~output .DPCLK_DELAY = 4'b0000;
defparam \z80_rd_n~output .OUT_DELAY = 1'b0;
defparam \z80_rd_n~output .IN_DATA_DELAY = 3'b000;
defparam \z80_rd_n~output .IN_REG_DELAY = 3'b000;

alta_rio \z80_wr_n~output (
	.padio(z80_wr_n),
	.datain(!\macro_inst|u_sram|sram_we_n~q ),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.combout(\z80_wr_n~input_o ),
	.regout());
defparam \z80_wr_n~output .coord_x = 0;
defparam \z80_wr_n~output .coord_y = 4;
defparam \z80_wr_n~output .coord_z = 5;
defparam \z80_wr_n~output .IN_ASYNC_MODE = 1'b0;
defparam \z80_wr_n~output .IN_SYNC_MODE = 1'b0;
defparam \z80_wr_n~output .IN_POWERUP = 1'b0;
defparam \z80_wr_n~output .OUT_REG_MODE = 1'b0;
defparam \z80_wr_n~output .OUT_ASYNC_MODE = 1'b0;
defparam \z80_wr_n~output .OUT_SYNC_MODE = 1'b0;
defparam \z80_wr_n~output .OUT_POWERUP = 1'b0;
defparam \z80_wr_n~output .OE_REG_MODE = 1'b0;
defparam \z80_wr_n~output .OE_ASYNC_MODE = 1'b0;
defparam \z80_wr_n~output .OE_SYNC_MODE = 1'b0;
defparam \z80_wr_n~output .OE_POWERUP = 1'b0;
defparam \z80_wr_n~output .CFG_TRI_INPUT = 1'b0;
defparam \z80_wr_n~output .CFG_INPUT_EN = 1'b0;
defparam \z80_wr_n~output .CFG_PULL_UP = 1'b0;
defparam \z80_wr_n~output .CFG_SLR = 1'b0;
defparam \z80_wr_n~output .CFG_OPEN_DRAIN = 1'b0;
defparam \z80_wr_n~output .CFG_PDRCTRL = 4'b0100;
defparam \z80_wr_n~output .CFG_KEEP = 2'b00;
defparam \z80_wr_n~output .CFG_LVDS_OUT_EN = 1'b0;
defparam \z80_wr_n~output .CFG_LVDS_SEL_CUA = 2'b00;
defparam \z80_wr_n~output .CFG_LVDS_IREF = 10'b0110000000;
defparam \z80_wr_n~output .CFG_LVDS_IN_EN = 1'b0;
defparam \z80_wr_n~output .DPCLK_DELAY = 4'b0000;
defparam \z80_wr_n~output .OUT_DELAY = 1'b0;
defparam \z80_wr_n~output .IN_DATA_DELAY = 3'b000;
defparam \z80_wr_n~output .IN_REG_DELAY = 3'b000;

endmodule
